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authorSunil Goutham <sgoutham@marvell.com>2019-11-14 10:56:29 +0530
committerDavid S. Miller <davem@davemloft.net>2019-11-14 18:09:16 -0800
commit5d9b976d4480dc0dcfa3719b645636d2f0f9f156 (patch)
tree1d38379c77e0f09aa22723f4a7fea767d56badc6 /tools/perf/scripts/python/export-to-postgresql.py
parent206ff848a1abaa1755310fdb4b20a3303ccf23d9 (diff)
octeontx2-af: Support fixed transmit scheduler topology
CN96xx initial silicon doesn't support all features pertaining to NIX transmit scheduling and shaping. - It supports a fixed topology of 1:1 mapped transmit limiters at all levels. - Supports DWRR only at SMQ/MDQ and TL1. - Doesn't support shaping and coloring. This patch adds HW capability structure by which each variant and skew of silicon can be differentiated by their supported features. And adds support for A0 silicon's transmit scheduler capabilities or rather limitations. Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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