diff options
| author | Matthew Brost <matthew.brost@intel.com> | 2025-01-13 16:25:07 -0800 |
|---|---|---|
| committer | Matthew Brost <matthew.brost@intel.com> | 2025-01-16 08:26:20 -0800 |
| commit | 758debf35b9cda5450e40996991a6e4b222899bd (patch) | |
| tree | e9dfcd4fb3a802917dfbccbb1da02ba678c417ee /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | 75d37750a753e7ae079e470ea9699caeae756e3d (diff) | |
drm/xe: Mark ComputeCS read mode as UC on iGPU
RING_CMD_CCTL read index should be UC on iGPU parts due to L3 caching
structure. Having this as WB blocks ULLS from being enabled. Change to
UC to unblock ULLS on iGPU.
v2:
- Drop internal communications commnet, bspec is updated
Cc: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com>
Cc: Michal Mrozek <michal.mrozek@intel.com>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: stable@vger.kernel.org
Fixes: 328e089bfb37 ("drm/xe: Leverage ComputeCS read L3 caching")
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Acked-by: Michal Mrozek <michal.mrozek@intel.com>
Reviewed-by: Stuart Summers <stuart.summers@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250114002507.114087-1-matthew.brost@intel.com
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions