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| author | Paulo Zanoni <paulo.r.zanoni@intel.com> | 2018-03-28 14:58:00 -0700 |
|---|---|---|
| committer | Paulo Zanoni <paulo.r.zanoni@intel.com> | 2018-05-07 16:44:54 -0700 |
| commit | bb82139b4bbf8bdb825a7339d34d231632e67f27 (patch) | |
| tree | 35c637b0ab13ae46c746b550c159955c5bd6aee1 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | febafb93181e4fb4de19f4484df62ce2d04155aa (diff) | |
drm/i915/icl: compute the combo PHY (DPLL) DP registers
Just use the hardcoded tables provided by our spec.
v2: Rebase.
v3: Clarify that 38.4 uses the 19.2 table (James).
Reviewed-by: James Ausmus <james.ausmus@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180328215803.13835-6-paulo.r.zanoni@intel.com
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
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