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| author | Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> | 2024-03-19 13:25:00 +0000 |
|---|---|---|
| committer | Andi Shyti <andi.shyti@kernel.org> | 2024-05-06 00:35:38 +0200 |
| commit | c1f39c62eb09fa2e692a9377295ecbd0740c0914 (patch) | |
| tree | 6d194274b8f4dbe6cc6f7c4856dc2b50fe608b2e /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | 51c87f0e6cca2b9762d10dfab52618318444d746 (diff) | |
dt-bindings: i2c: renesas,riic: Document R9A09G057 support
Document support for the I2C Bus Interface (RIIC) available in the
Renesas RZ/V2H(P) (R9A09G057) SoC.
The RIIC interface in the Renesas RZ/V2H(P) differs from RZ/A in a
couple of ways:
- Register offsets for the RZ/V2H(P) SoC differ from those of the
RZ/A SoC.
- RZ/V2H register access is limited to 8-bit, whereas RZ/A supports
8/16/32-bit.
- RZ/V2H has bit differences in the slave address register.
To accommodate these differences, a new compatible string
"renesas,riic-r9a09g057" is added.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Andi Shyti <andi.shyti@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions