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| author | Victor Shih <victor.shih@genesyslogic.com.tw> | 2023-06-09 15:14:39 +0800 |
|---|---|---|
| committer | Ulf Hansson <ulf.hansson@linaro.org> | 2023-06-12 15:20:08 +0200 |
| commit | d2754355512e51c1e6c37975ccc5bdca635b3718 (patch) | |
| tree | b518789a3aab4e46b8e84af18c5d33991796c9dc /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | f3a5b56c1286444204c95ba78e1b03961aac580c (diff) | |
mmc: sdhci-pci-gli: Set SDR104's clock to 205MHz and enable SSC for GL9767
Set GL9767 SDR104's clock to 205MHz and enable SSC feature
depend on register 0x888 BIT(1).
Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw>
Signed-off-by: Victor Shih <victor.shih@genesyslogic.com.tw>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/20230609071441.451464-3-victorshihgli@gmail.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions