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authorTakeshi Kihara <takeshi.kihara.df@renesas.com>2017-07-13 01:55:42 +0900
committerGeert Uytterhoeven <geert+renesas@glider.be>2017-07-17 11:01:49 +0200
commitf21b4fca14ad00a64fbb4460e14172ce9ced9c97 (patch)
treee2667cb890635afcee3055b250ac74b9b8547673 /tools/perf/scripts/python/export-to-postgresql.py
parent6fb1870912f84b1d81fd21cdfe8c9a75f8aa1669 (diff)
pinctrl: sh-pfc: r8a7796: Fix MOD_SEL register pin assignment for TCLK{1,2}_{A,B} pins group
This patch fixes to set MOD_SEL2 bit19 when using TCLK2_A pin function is selected for IPSR16 bit[23:20] or using TCLK2_B pin function is selected for IPSR17 bit[27:24]. This is a correction to the incorrect implementation of MOD_SEL register pin assignment for R8A7796 SoC specification of R-Car Gen3 Hardware User's Manual Rev.0.51E or later. Fixes: f9aece7344bd81ce ("pinctrl: sh-pfc: Initial R8A7796 PFC support") Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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