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| author | Tim Huang <Tim.Huang@amd.com> | 2023-06-09 13:11:44 +0800 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2023-06-15 10:46:00 -0400 |
| commit | fcdb3832a4edece23c043ce97b3a1f7647bec929 (patch) | |
| tree | a05afba25079fa7eff2f18ea2139a2adf8b1098c /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | d50dc746ff72b9c48812dac3344fa87fbde940a3 (diff) | |
drm/amd/pm: enable vclk and dclk Pstates for SMU v13.0.5
Add the ability to control the vclk and dclk frequency by
power_dpm_force_performance_level interface.
Signed-off-by: Tim Huang <Tim.Huang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by:Â Yifan Zhang <yifan1.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions