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authorKevin Chen <kevin_chen@aspeedtech.com>2024-10-16 10:24:09 +0800
committerThomas Gleixner <tglx@linutronix.de>2024-10-17 21:35:28 +0200
commit37a99ff53d1d913ec5b435cbe977a811b7b37995 (patch)
treeae68c6b2a291df3b70c6a3dcc063089fda816841 /tools/perf/scripts/python/export-to-sqlite.py
parentef4c675dc2961ee533bdc1ea20390761df0af5be (diff)
dt-bindings: interrupt-controller: Add support for ASPEED AST27XX INTC
The ASPEED AST27XX interrupt controller(INTC) contains second level and third level interrupt controller. INTC0: The second level INTC, which used to assert GIC if interrupt in INTC1 asserted. INTC1_x: The third level INTC, which used to assert INTC0 if interrupt in modules of INTC asserted. The relationship is like the following: +-----+ +-------+ +---------+---module0 | GIC |---| INTC0 |--+--| INTC1_0 |---module1 | | | | | | |---... +-----+ +-------+ | +---------+---module31 | | +---------+---module0 +---| INTC1_1 |---module1 | | |---... | +---------+---module31 ... | +---------+---module0 +---| INTC1_5 |---module1 | |---... +---------+---module31 Signed-off-by: Kevin Chen <kevin_chen@aspeedtech.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/all/20241016022410.1154574-2-kevin_chen@aspeedtech.com
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