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| author | Ajay Singh <ajay.kathat@microchip.com> | 2021-09-16 16:49:20 +0000 |
|---|---|---|
| committer | Kalle Valo <kvalo@codeaurora.org> | 2021-09-21 18:08:16 +0300 |
| commit | c2dcb4766bcb1e3622d7579ee9d57f28dc2c2f2e (patch) | |
| tree | 18ce6daefbc5af56d5cd8b309fbe37cc1429798d /tools/perf/scripts/python/exported-sql-viewer.py | |
| parent | 1bcc0879c963770c90bc07d9aa5d0d50dda925f3 (diff) | |
wilc1000: handle read failure issue for clockless registers
For SPI bus, the register read fails after read/write to the clockless
register during chip wakeup sequence. Add workaround to send CMD_RESET
command during chip wake-up sequence to overcome the issue.
Signed-off-by: Ajay Singh <ajay.kathat@microchip.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
Link: https://lore.kernel.org/r/20210916164902.74629-7-ajay.kathat@microchip.com
Diffstat (limited to 'tools/perf/scripts/python/exported-sql-viewer.py')
0 files changed, 0 insertions, 0 deletions