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| author | Siddharth Vadapalli <s-vadapalli@ti.com> | 2025-04-22 17:30:39 +0530 |
|---|---|---|
| committer | Nishanth Menon <nm@ti.com> | 2025-05-02 08:29:34 -0500 |
| commit | f0f78192d3b3b3c3c935de0d681e7bf2117bbb13 (patch) | |
| tree | dca79c370520ab587099987376e27616cf47f836 /tools/perf/scripts/python/exported-sql-viewer.py | |
| parent | 1025003a1e068a25b35e1dbb39cad18e23278c0f (diff) | |
arm64: dts: ti: k3-j721e-main: Switch to 64-bit address space for PCIe0 and PCIe1
The PCIe0 and PCIe1 instances of PCIe in J721E SoC support:
1. 128 MB address region in the 32-bit address space
2. 4 GB address region in the 64-bit address space
The default configuration is that of a 128 MB address region in the
32-bit address space. While this might be sufficient for most use-cases,
it is insufficient for supporting use-cases which require larger address
spaces. Therefore, switch to using the 64-bit address space with a 4 GB
address region.
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Link: https://lore.kernel.org/r/20250422120042.3746004-5-s-vadapalli@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
Diffstat (limited to 'tools/perf/scripts/python/exported-sql-viewer.py')
0 files changed, 0 insertions, 0 deletions