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| author | Linu Cherian <lcherian@marvell.com> | 2025-02-12 17:19:17 +0530 |
|---|---|---|
| committer | Suzuki K Poulose <suzuki.poulose@arm.com> | 2025-02-21 16:17:36 +0000 |
| commit | 4b7e62627a38521e5b83dcc3a9d4ad3c18d7fd3f (patch) | |
| tree | 98b103f3036e1c2409e2c66d50f90e94a07850c6 /tools/perf/scripts/python/stackcollapse.py | |
| parent | 942bbeeaf84491645b843680555b50ff9e336711 (diff) | |
coresight: config: Add preloaded configuration
Add a preloaded configuration for generating
external trigger on address match. This can be
used by CTI and ETR blocks to stop trace capture
on kernel panic.
Kernel address for "panic" function is used as the
default trigger address.
This new configuration is available as,
/sys/kernel/config/cs-syscfg/configurations/panicstop
Signed-off-by: Linu Cherian <lcherian@marvell.com>
Reviewed-by: James Clark <james.clark@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20250212114918.548431-8-lcherian@marvell.com
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions