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authorMarijn Suijten <marijn.suijten@somainline.org>2025-01-22 17:23:44 +0100
committerDmitry Baryshkov <dmitry.baryshkov@linaro.org>2025-02-25 20:07:44 +0200
commitb6090ffb30f3301d3831774f9c3e2f1b1141a399 (patch)
tree00bcfc8204c07f46de65e401d1e67c3d45cb822a /tools/perf/scripts/python/task-analyzer.py
parent25dc6948a06f91164aebeba8e5bb4203448bca0d (diff)
drm/msm/dpu: Fall back to a single DSC encoder (1:1:1) on small SoCs
Some SoCs such as SC7280 (used in the Fairphone 5) have only a single DSC "hard slice" encoder. The current hardcoded use of 2:2:1 topology (2 LM and 2 DSC for a single interface) make it impossible to use Display Stream Compression panels with mainline, which is exactly what's installed on the Fairphone 5. By loosening the hardcoded `num_dsc = 2` to fall back to `num_dsc = 1` when the catalog only contains one entry, we can trivially support this phone and unblock further panel enablement on mainline. A few more supporting changes in this patch ensure hardcoded constants of 2 DSC encoders are replaced to count or read back the actual number of DSC hardware blocks that are enabled for the given virtual encoder. Likewise DSC_MODE_SPLIT_PANEL can no longer be unconditionally enabled. Cc: Luca Weiss <luca.weiss@fairphone.com> Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Tested-by: Luca Weiss <luca.weiss@fairphone.com> Reviewed-by: Jessica Zhang <quic_jesszhan@quicinc.com> Tested-by: Danila Tikhonov <danila@jiaxyga.com> Patchwork: https://patchwork.freedesktop.org/patch/633318/ Link: https://lore.kernel.org/r/20250122-dpu-111-topology-v2-1-505e95964af9@somainline.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
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