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authorSiddharth Vadapalli <s-vadapalli@ti.com>2025-04-22 17:30:38 +0530
committerNishanth Menon <nm@ti.com>2025-05-02 08:29:30 -0500
commit1025003a1e068a25b35e1dbb39cad18e23278c0f (patch)
treeaa6cb6e1e842f522310c1c7207b41430d035cdd9 /tools/perf/scripts/python
parent46e3d7d7048872ffb90aa25e360b975dc1c3e28b (diff)
arm64: dts: ti: k3-j721e: Add ranges for PCIe0 DAT1 and PCIe1 DAT1
The PCIe0 DAT1 and PCIe1 DAT1 are 4 GB address regions in the 64-bit address space of the respective PCIe Controllers. Hence, update the ranges to include them. Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com> Reviewed-by: Udit Kumar <u-kumar1@ti.com> Link: https://lore.kernel.org/r/20250422120042.3746004-4-s-vadapalli@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
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