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The Tegra124 MIPI hardware block is very similar to the one found on
earlier chip generations. Add a corresponding compatible string.
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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DTS coding style expects labels to be lowercase. No functional impact.
Verified with comparing decompiled DTB (dtx_diff and fdtdump+diff).
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Link: https://lore.kernel.org/r/20250219085726.70824-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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DTS coding style expects labels to be lowercase. No functional impact.
Verified with comparing decompiled DTB (dtx_diff and fdtdump+diff).
Reviewed-by: André Draszik <andre.draszik@linaro.org>
Reviewed-by: Peter Griffin <peter.griffin@linaro.org>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Link: https://lore.kernel.org/r/20250219085726.70824-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Reorder properties to comply with the DeviceTree coding style guidelines:
https://docs.kernel.org/devicetree/bindings/dts-coding-style.html
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Link: https://lore.kernel.org/r/20250305085537.3976579-5-w.egorov@phytec.de
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
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style
Reorder properties to comply with the DeviceTree coding style guidelines:
https://docs.kernel.org/devicetree/bindings/dts-coding-style.html
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Link: https://lore.kernel.org/r/20250305085537.3976579-4-w.egorov@phytec.de
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
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The bootph-all and bootph-pre-ram tags were introduced in dt-schema
(dtschema/schemas/bootph.yaml) to define node usage across different
boot phases.
Add boot phase tags to all required nodes to ensure boot support from
all sources, including UART, Ethernet, uSD card, eMMC, and OSPI NOR Flash.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Link: https://lore.kernel.org/r/20250305085537.3976579-3-w.egorov@phytec.de
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
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The bootph-all and bootph-pre-ram tags were introduced in dt-schema
(dtschema/schemas/bootph.yaml) to define node usage across different
boot phases.
Add boot phase tags to all required nodes to ensure boot support from
all sources, including UART, USB (DFU), Ethernet, uSD card, eMMC, and
OSPI NOR Flash.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Link: https://lore.kernel.org/r/20250305085537.3976579-2-w.egorov@phytec.de
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
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The bootph-all and bootph-pre-ram tags were introduced in dt-schema
(dtschema/schemas/bootph.yaml) to define node usage across different
boot phases.
Add boot phase tags to all required nodes to ensure boot support from
all sources, including UART, USB (DFU), Ethernet, uSD card, eMMC, and
OSPI NOR Flash.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Link: https://lore.kernel.org/r/20250305085537.3976579-1-w.egorov@phytec.de
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
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Add DWI backlight controller nodes for Apple A11 SoC, and enable it for:
- iPhone 8
- iPhone 8 Plus
Signed-off-by: Nick Chan <towinchenmi@gmail.com>
Link: https://lore.kernel.org/r/20250228-dwi-dt-v2-5-69e450bc4bfb@gmail.com
Signed-off-by: Sven Peter <sven@svenpeter.dev>
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Add DWI backlight controller nodes for Apple A10 SoC, and enable it for:
- iPhone 7
- iPhone 7 Plus
- iPod touch 7
- iPad 6
- iPad 7
Signed-off-by: Nick Chan <towinchenmi@gmail.com>
Link: https://lore.kernel.org/r/20250228-dwi-dt-v2-4-69e450bc4bfb@gmail.com
Signed-off-by: Sven Peter <sven@svenpeter.dev>
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Add DWI backlight controller nodes for Apple A9 SoC, and enable it for:
- iPhone 6
- iPhone 6s
- iPhone SE
- iPad 5
Signed-off-by: Nick Chan <towinchenmi@gmail.com>
Link: https://lore.kernel.org/r/20250228-dwi-dt-v2-3-69e450bc4bfb@gmail.com
Signed-off-by: Sven Peter <sven@svenpeter.dev>
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Add DWI backlight controller nodes for Apple A8 SoC, and enable it for:
- iPhone 6
- iPhone 6 Plus
- iPad mini 4
- iPod touch 6
Signed-off-by: Nick Chan <towinchenmi@gmail.com>
Link: https://lore.kernel.org/r/20250228-dwi-dt-v2-2-69e450bc4bfb@gmail.com
Signed-off-by: Sven Peter <sven@svenpeter.dev>
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Add DWI backlight controller nodes for Apple A7 SoC, and enable it for
iPhone 5s.
Signed-off-by: Nick Chan <towinchenmi@gmail.com>
Link: https://lore.kernel.org/r/20250228-dwi-dt-v2-1-69e450bc4bfb@gmail.com
Signed-off-by: Sven Peter <sven@svenpeter.dev>
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https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux into soc/dt
MediaTek ARM64 DTS updates for v6.15
This adds new SoCs and new machines, other than improving support for
currently supported ones.
In particular, for SoCs:
- Airoha EN7581 gets support for its SCU clock controller, SPI NAND,
hardware RNG, pinctrl, and i2c controllers;
- MediaTek MT8365 SoC gets support for all of its Display Controller
components;
- MediaTek Genio 510 MT8370 - a lower binned variant of Genio 700
MT8390 (which, in turn, is the same as MT8188) - is introduced;
- MT8188 gets support for more Display Controller components (DSC
and MERGE), for the tertiary MSDC (eMMC/SD/SDIO) controller, and
for the MTU3 USB DRD controllers;
- MT8195 and MT8188 both get migrated to the new OF Graph used for
defining a pipeline for the Display Controller components (as
this was previously hardcoded per-board in the drm driver, ugh!);
..and for boards:
- Google Kukui (MT8183) is switched to Elan touchscreen driver
instead of hid-over-i2c to fix probe failures in some cases;
- Google Cherry (MT8195) and Geralt (MT8188) Chromebooks get
migrated to using OF Graph for defining their board specific
part of the display pipeline;
- MediaTek Genio 350 (mt8365) EVK board adds support for HDMI output
through the iTE IT66121 chip, and for DSI output to the Startek
KD070FHFID015 display;
- MediaTek Genio 510 EVK board is introduced with a common devicetree
between mt8390 and mt8370 (Genio 700 and Genio 510) EVKs;
- MediaTek Genio 700 (and 510) EVKs get support for their integrated
dual Digital Microphones, for their RichTek RT1715 USB Type-C
Controller with USB-PD capability, the iTE IT5205 Alternate Mode
Passive MUX (USB3.1/DP1.4), and for USB Gadget/Host switching
through the MTU3 DRD Controller, other than for USB in general;
- MediaTek Genio 1200 EVK gets support for its MediaTek MT6360 PMIC
integrated Type-C Controller, and the IT5205 MUX;
- Radxa NIO-12L gets its DSI display pipeline preconfigured and also
the introduction of a devicetree overlay for the official Radxa
8HD DSI panel, enabling display output over DSI.
And fixes/cleanups:
- MT8173 gets fixes for bindings validation: PMIC node drops the
unnecessary address/size cells, disp-pwm gets its compatibles
list fixed (as mt6595 was not expected there), and some nodes
got the right name (clock controllers were disguides as power
controllers, and intpol was changed to interrupt-controller);
- MT8188-based (MT8390) Genio boards get a fix for duplicated
regulator name;
- MT6359 PMIC gets fixes for audio-codec node validation.
* tag 'mtk-dts64-for-v6.15' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux: (35 commits)
arm64: dts: mediatek: mt8395-radxa-nio-12l: Add Radxa 8 HD panel
arm64: dts: mediatek: mt8395-nio-12l: Prepare MIPI DSI port
arm64: dts: mediatek: mt8390-genio-common: Add delay codec for DMIC
arm64: dts: mediatek: mt8390-genio-common: Add routes for DMIC
arm64: dts: mediatek: mt8395-nio-12l: Preconfigure DSI0 pipeline
arm64: mediatek: mt8195-cherry: Add graph for eDP and DP displays
arm64: dts: mediatek: mt8195: Add base display controller graph
arm64: dts: airoha: en7581: Fix clock-controller address
arm64: dts: airoha: en7581: Add more nodes to EN7581 SoC evaluation board
arm64: dts: mediatek: mt8390-genio-common: Configure touch vreg pins
arm64: dts: mediatek: mt8188-geralt: Add graph for DSI and DP displays
arm64: dts: mediatek: mt8188: Add base display controller graph
arm64: dts: mediatek: mt8390-genio-700: Add USB, TypeC Controller, MUX
arm64: dts: mediatek: mt8188: Add MTU3 nodes and correctly describe USB
dt-bindings: usb: mediatek,mtk-xhci: Add port for SuperSpeed EP
arm64: dts: mediatek: mt8395-genio-1200-evk: add support for TCPC port
dt-bindings: usb: mtu3: Add ports property
arm64: dts: mediatek: mt8390-genio-common: Fix duplicated regulator name
arm64: dts: mediatek: mt8183: Switch to Elan touchscreen driver
arm64: dts: mediatek: mt6359: fix dtbs_check error for audio-codec
...
Link: https://lore.kernel.org/r/20250306113540.148342-1-angelogioacchino.delregno@collabora.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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"regulator-ramp-delay-scale" property
Remove "regulator-ramp-delay-scale" property which is both unused in the
kernel and undocumented. Most likely they are leftovers from downstream.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250305224952.2995841-2-robh@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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https://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into soc/dt
Armv8 FVP/Vexpress/Juno updates for v6.15
The main and bulk of the addition this time is the support for the Arm
reference Morello System Development Platform (SDP).
The Morello architecture is an experimental extension to Armv8.2-A,
enhancing the AArch64 execution state with capabilities for fine-grained
memory protection and scalable software compartmentalization. However
these changes doesn't add any of the support for security enhancements.
This is mainly adding device tree support for Morello SDP.
The platform iteslf is shipped with ACPI firmware. However, since the
ACPI bindings for GPU, DPU, I2C, I2S,..etc are not well defined or not
provided in the shipped ACPI firmware, there is a need for the device
tree as alternative for the developers focusing on those features.
The CPU is called rainier, the architecture is Morello and the platform
is Morello SDP board. There is FVP equivalent of the same though they
are not completely in feature parity with the real hardware.
These changes provide the initial support for Morello SDP and FVP
platforms.
Apart from this, we have an update to add support for secondary cores
on Corstone1000 FVP platform.
* tag 'juno-updates-6.15' of https://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
arm64: dts: corstone1000: Add definitions for secondary CPU cores
MAINTAINERS: Add Vincenzo Frascino as Arm Morello Maintainer
arm64: dts: morello: Add support for fvp dts
arm64: dts: morello: Add support for soc dts
arm64: dts: morello: Add support for common functionalities
dt-bindings: arm-pmu: Add support for ARM Rainier PMU
dt-bindings: arm: Add Rainier compatibility
dt-bindings: arm: Add Morello fvp compatibility
dt-bindings: arm: Add Morello compatibility
arm64: Kconfig: Update description for CONFIG_ARCH_VEXPRESS
Link: https://lore.kernel.org/r/20250304105856.432848-1-sudeep.holla@arm.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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soc/dt
Apple SoC DT updates for 6.15, second batch:
- Added a missing p-state for iPad mini 4
- Added SPI controller nodes for M1 and M2 devices
- Added SPI NOR flash nodes and NVRAM partitions
- Added touchbar digitizer nodes for M1 and M2 devices
* tag 'asahi-soc-dt-6.15-v2' of https://github.com/AsahiLinux/linux:
arm64: dts: apple: Add touchbar digitizer nodes
arm64: dts: apple: Add SPI NOR nvram partition to all devices
arm64: dts: apple: t600x: Add spi controller nodes
arm64: dts: apple: t8112: Add spi controller nodes
arm64: dts: apple: t8103: Add spi controller nodes
arm64: dts: apple: t8103: Fix spi4 power domain sort order
arm64: dts: apple: t7000: Add missing CPU p-state 7 for J96 and J97
Link: https://lore.kernel.org/r/20250302115808.59172-1-sven@svenpeter.dev
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt
Renesas DTS updates for v6.15
- Add support for the second and third Ethernet interfaces on the Gray
Hawk Single development board,
- Add Image Signal Processor helper block (FCPVX and VSPX) support for
the R-Car V3U and V4M SoCs,
- Add Watchdog and System Controller support for the RZ/G3E SoC and
the RZ/G3E SMARC Carrier-II EVK development board,
- Add initial support for the Yuridenki-Shokai Kakip and MYIR Remi Pi
boards,
- Add support for the spare UART and PMOD serial ports on the RZ/G3S
SMARC Carrier II board,
- Add a CPU Operating Performance Points table for the RZ/G3S SoC,
- Add boot phase tags on R-Car Gen2/3/4 and RZ/G2 boards,
- Miscellaneous fixes and improvements.
* tag 'renesas-dts-for-v6.15-tag1' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (34 commits)
ARM: dts: renesas: r9a06g032: Fix UART dma channel order
arm64: dts: renesas: rzg2: Add boot phase tags
arm64: dts: renesas: rcar: Add boot phase tags
ARM: dts: renesas: rcar-gen2: Add boot phase tags
arm64: dts: renesas: white-hawk-csi-dsi: Use names for CSI-2 data line orders
arm64: dts: renesas: ulcb/kf: Use TDM Split Mode for capture
arm64: dts: renesas: Add initial support for MYIR Remi Pi
arm64: dts: renesas: r9a08g045: Add OPP table
arm64: dts: renesas: r9a09g057: Enable SYS node
arm64: dts: renesas: r9a09g047: Add SYS node
arm64: dts: renesas: r9a08g045: Enable SYS node
arm64: dts: renesas: r8a779f0: Disable rswitch ports by default
arm64: dts: renesas: r9a08g045s33-smarc-pmod: Add overlay for SCIF1
arm64: dts: renesas: rzg3s-smarc: Enable SCIF3
arm64: dts: renesas: rzg3s-smarc-switches: Add a header to describe different switches
arm64: dts: renesas: r8a779g0: Restore sort order
arm64: dts: renesas: s4sk: Fix ethernet0 alias for rswitch
arm64: dts: renesas: spider-ethernet: Add ethernetN aliases for rswitch
arm64: dts: renesas: s4sk: Access rswitch ports via phandles
arm64: dts: renesas: spider-ethernet: Access rswitch ports via phandles
...
Link: https://lore.kernel.org/r/cover.1740156747.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt
Renesas DT binding updates for v6.15
- Document support for the Yuridenki-Shokai Kakip (based on RZ/V2H)
and MYIR Remi Pi (based on RZ/G2L) boards,
- Document support for the RZ/G3E System Controller.
* tag 'renesas-dt-bindings-for-v6.15-tag1' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
dt-bindings: soc: renesas: Document MYIR Remi Pi board
dt-bindings: soc: renesas: Add RZ/G3E variant SYS binding
dt-bindings: soc: renesas: Document Yuridenki-Shokai Kakip board
dt-bindings: vendor-prefixes: Add Yuridenki-Shokai Co. Ltd.
dt-bindings: soc: renesas: Document more Renesas RZ/V2H SoC variants
Link: https://lore.kernel.org/r/cover.1740156745.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into soc/dt
Some minor IXP4xx updates for v6.15:
- Assing the right NPE for EthA
- Fix up erroneous PCI mappings on WG302
- Add LEDs and keys on GPIO to WG302
* tag 'ixp4xx-dts-soc-for-v6.15' of https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
ARM: dts: ixp4xx: Add Netgear WG302 v1 GPIOs
ARM: dts: ixp4xx: Fix up PCI on WG302
ARM: dts: Properly assign NPE to ethA
Link: https://lore.kernel.org/r/CACRpkdbi_A_RCufEZSk0cEoQ_H-s0VLGUzJ9zPQECSvsUP7-dQ@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Apple SoC DT updates for 6.15:
- Added device trees for Apple T2 SoCs
- Added cpufreq and PMGR compatibles and nodes for Apple A7-A11 and T2
SoCs
* tag 'asahi-soc-dt-6.15' of https://github.com/AsahiLinux/linux: (23 commits)
arm64: dts: apple: t8015: Add cpufreq nodes
arm64: dts: apple: t8012: Add cpufreq nodes
arm64: dts: apple: t8011: Add cpufreq nodes
arm64: dts: apple: t8010: Add cpufreq nodes
arm64: dts: apple: s8001: Add cpufreq nodes
arm64: dts: apple: Add cpufreq nodes for S8000/S8003
arm64: dts: apple: t7001: Add cpufreq nodes
arm64: dts: apple: t7000: Add cpufreq nodes
arm64: dts: apple: s5l8960x: Add cpufreq nodes
arm64: dts: apple: t8015: Add PMGR nodes
arm64: dts: apple: t8012: Add PMGR nodes
arm64: dts: apple: t8011: Add PMGR nodes
arm64: dts: apple: t8010: Add PMGR nodes
arm64: dts: apple: s8001: Add PMGR nodes
arm64: dts: apple: s800-0-3: Add PMGR nodes
arm64: dts: apple: t7001: Add PMGR node
arm64: dts: apple: t7000: Add PMGR node
arm64: dts: apple: s5l8960x: Add PMGR node
dt-bindings: arm: apple: apple,pmgr-pwrstate: Add A7-A11, T2 compatibles
dt-bindings: arm: apple: apple,pmgr: Add A7-A11, T2 compatibles
...
Link: https://lore.kernel.org/r/20250209135558.8243-1-sven@svenpeter.dev
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Enable Mali-G31 (GPU) node on EVK board.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250218115922.407816-4-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Add Mali-G31 GPU node to SoC DTSI.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250218115922.407816-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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MNT Reform 2 is an open source laptop with replaceable CPU modules,
including a version with the RK3588-based MNT RCORE[1], which is based
on Firefly's iCore-3588Q SoM:
- Rockchip RK3588
- Quad A76 and Quad A55 CPU
- 6 TOPS NPU
- up to 32GB LPDDR4x RAM
- SD Card slot
- Gigabit ethernet port
- HDMI port
- 2x mPCIe ports for WiFi or NVMe
- 3x USB 3.0 Type-A HOST port
[1] https://shop.mntre.com/products/mnt-reform
Co-developed-by: "Lukas F. Hartmann" <lukas@mntre.com>
Signed-off-by: "Lukas F. Hartmann" <lukas@mntre.com>
Signed-off-by: Patrick Wildt <patrick@blueri.se>
Link: https://lore.kernel.org/r/Z8S6uDM634KJuyKP@windev.fritz.box
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Document board compatible bindings for the MNT Reform 2 with it's RCORE
SoM, which is based on Firefly's iCore-3588Q.
Signed-off-by: Patrick Wildt <patrick@blueri.se>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/Z8S5SHqUqKYiT6Wd@windev.fritz.box
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Add compatible string for VPU GRF found on RK3528 SoC.
Signed-off-by: Yao Zi <ziyao@disroot.org>
Acked-by: "Rob Herring (Arm)" <robh@kernel.org>
Link: https://lore.kernel.org/r/20250305194217.47052-3-ziyao@disroot.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Add compatible string for VO GRF found on RK3528 SoC.
Signed-off-by: Yao Zi <ziyao@disroot.org>
Acked-by: "Rob Herring (Arm)" <robh@kernel.org>
Link: https://lore.kernel.org/r/20250305194217.47052-2-ziyao@disroot.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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The Radxa 8 HD touchscreen can be used with various Radxa board
and is sold appart from the Radxa NIO 12L development kit.
Add a DTS overlay for this panel.
Signed-off-by: Julien Massot <julien.massot@collabora.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20250304-radxa-panel-overlay-v2-2-3ee6797d3f86@collabora.com
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
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This board can use a MIPI-DSI panel on the DSI0 connector: in
preparation for adding an overlay for the Radxa Display 8HD,
add the backlight, and some definitions for pins available
through the DSI0 port.
Signed-off-by: Julien Massot <julien.massot@collabora.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20250304-radxa-panel-overlay-v2-1-3ee6797d3f86@collabora.com
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
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The signal from the dual digital microphones connected to the DMIC_BE
takes 30ms to settle after being enabled. Add a dmic-codec with
corresponding wakeup-delay-ms to prevent an initial "pop" sound when
recording with the microphones.
Co-developed-by: Zoran Zhan <zoran.zhan@mediatek.com>
Signed-off-by: Zoran Zhan <zoran.zhan@mediatek.com>
Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20250225-genio700-dmic-v2-8-3076f5b50ef7@collabora.com
[Angelo: Resolved merge conflicts]
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
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Add necessary routes for the onboard dual DMIC present on the Genio
700/510 EVK. The dmic is supplied by micbias0 and micbias2, and inputs
into the MT8188 DMIC DAI.
Co-developed-by: parkeryang <Parker.Yang@mediatek.com>
Signed-off-by: parkeryang <Parker.Yang@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Link: https://lore.kernel.org/r/20250225-genio700-dmic-v2-6-3076f5b50ef7@collabora.com
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
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This board can use a MIPI-DSI panel on the DSI0 connector: in
preparation for adding an overlay for the Radxa Display 8HD,
add a pipeline connecting VDOSYS0 components to DSI0.
This pipeline remains disabled by default, as it is expected
to be enabled only by a devicetree overlay that declares the
actual DSI panel node, completing the graph.
Link: https://lore.kernel.org/r/20250213112008.56394-4-angelogioacchino.delregno@collabora.com
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
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The base SoC devicetree now defines a display controller graph:
connect the board specific outputs (eDP internal display, DP
external display) to fully migrate Cherry and make it finally
possible to make Chromebooks and other board types to coexist
without per-board driver modifications.
Link: https://lore.kernel.org/r/20250213112008.56394-3-angelogioacchino.delregno@collabora.com
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
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The display related IPs in MT8195 are flexible and support being
interconnected with different instances of DDP IPs and/or with
different DDP IPs, forming a full Display Data Path that ends
with an actual display output, which is board specific.
Add a common graph in the main mt8195.dtsi devicetree, which is
shared between all of the currently supported boards.
All boards featuring any display functionality will extend this
common graph to hook the display controller of the SoC to their
specific output port(s).
Link: https://lore.kernel.org/r/20250213112008.56394-2-angelogioacchino.delregno@collabora.com
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
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Fix the following warning for clock-controller node:
DTC [C] arch/arm64/boot/dts/airoha/en7581-evb.dtb
arch/arm64/boot/dts/airoha/en7581.dtsi:176.37-181.5: Warning (simple_bus_reg): /soc/clock-controller@1fa20000: simple-bus unit address format error, expected "1fb00000"
Fixes: 7693017580e9 ("arm64: dts: airoha: en7581: Add Clock Controller node")
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20250221-en7581-dts-spi-pinctrl-v3-2-4719e2d01555@kernel.org
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
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Introduce the following nodes to EN7581 SoC and EN7581 evaluation board:
- rng controller
- pinctrl
- i2c controllers
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20250221-en7581-dts-spi-pinctrl-v3-1-4719e2d01555@kernel.org
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
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Add a pinctrl configuration for the Touchscreen IC's power line
to make sure that the pin is configured as GPIO and to stop
relying on correct pin configuration from bootloader.
Link: https://lore.kernel.org/r/20250220110948.45596-5-angelogioacchino.delregno@collabora.com
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
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The base SoC devicetree now defines a display controller graph:
connect the board specific outputs (eDP internal display, DP
external display) to fully migrate Cherry and make it finally
possible to make Chromebooks and other board types to coexist
without per-board driver modifications.
Tested-by: Chen-Yu Tsai <wenst@chromium.org> # On MT8188 Ciri (int. and ext.)
Link: https://lore.kernel.org/r/20250220110948.45596-4-angelogioacchino.delregno@collabora.com
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
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Enable vop and hdmi on rk3576 evb1, so we can get a display output
on this board now.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Link: https://lore.kernel.org/r/20250305025128.479245-1-andyshrk@163.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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J722S EVM has four RPi camera connectors and dual MIPI Samtec CSI
connectors which bring out the 4 x CSI2RX instances and the I2C camera
control interfaces. Add the nodes for PCA9543 I2C switch and enable them.
J722S EVM schematics: https://www.ti.com/lit/pdf/sprujb5
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Reviewed-by: Yemike Abhilash Chandra <y-abhilashchandra@ti.com>
Link: https://lore.kernel.org/r/20250218185452.600797-4-vaishnav.a@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
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J722S has 4 CSI2RX receiver instances with external DPHY. The first CSI2RX
instance node is derived from the AM62P common dtsi, Add the nodes for the
subsequent three instances and keep them disabled.
TRM (12.6 Camera Peripherals): https://www.ti.com/lit/zip/sprujb3
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Reviewed-by: Yemike Abhilash Chandra <y-abhilashchandra@ti.com>
Link: https://lore.kernel.org/r/20250218185452.600797-3-vaishnav.a@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
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J722S has a dedicated CSI BCDMA instance which is slightly different
from AM62P in TX channel support, add the overrides and additional
properties to support CSI BCDMA on J722S.
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Reviewed-by: Yemike Abhilash Chandra <y-abhilashchandra@ti.com>
Link: https://lore.kernel.org/r/20250218185452.600797-2-vaishnav.a@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
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It appears that pinctrl-single is misused on this SoC to control both
the mux and the input and output and bias settings. This results in
non-working pinctrl configurations for GPIOs within the device tree.
This is what happens:
(1) During startup the pinctrl settings are applied according to the
device tree. I.e. the pin is configured as output and with
pull-ups enabled.
(2) During startup a device driver requests a GPIO.
(3) pinctrl-single is applying the default GPIO setting according to
the pinctrl-single,gpio-range property.
This would work as expected if the pinctrl-single is only controlling
the function mux, but it also controls the input/output buffer enable,
the pull-up and pull-down settings etc (pinctrl-single,function-mask
covers the entire pad setting instead of just the mux field).
Remove the pinctrl-single,gpio-range property, so that no settings are
applied during a gpio_request() call.
Fixes: 5e5c50964e2e ("arm64: dts: ti: k3-j722s: Add gpio-ranges properties")
Signed-off-by: Michael Walle <mwalle@kernel.org>
Link: https://lore.kernel.org/r/20250221091447.595199-2-mwalle@kernel.org
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
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It appears that pinctrl-single is misused on this SoC to control both
the mux and the input and output and bias settings. This results in
non-working pinctrl configurations for GPIOs within the device tree.
This is what happens:
(1) During startup the pinctrl settings are applied according to the
device tree. I.e. the pin is configured as output and with
pull-ups enabled.
(2) During startup a device driver requests a GPIO.
(3) pinctrl-single is applying the default GPIO setting according to
the pinctrl-single,gpio-range property.
This would work as expected if the pinctrl-single is only controlling
the function mux, but it also controls the input/output buffer enable,
the pull-up and pull-down settings etc (pinctrl-single,function-mask
covers the entire pad setting instead of just the mux field).
Remove the pinctrl-single,gpio-range property, so that no settings are
applied during a gpio_request() call.
Fixes: d72d73a44c3c ("arm64: dts: ti: k3-am62p: Add gpio-ranges properties")
Signed-off-by: Michael Walle <mwalle@kernel.org>
Link: https://lore.kernel.org/r/20250221091447.595199-1-mwalle@kernel.org
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
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Add a device tree overlay for SPI1 , UART3 and GPIO1 on
X27 connector.
By default, not all interfaces on the X27 connector are accessible
due to being disabled or set to alternative pin mux configurations.
This overlay activates and configures these interfaces to support
connections with external devices.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Link: https://lore.kernel.org/r/20250128100356.462934-1-d.schultz@phytec.de
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
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Enable hdmi display on sige5 board.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Link: https://lore.kernel.org/r/20241231095728.253943-4-andyshrk@163.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Add hdmi and it's phy dt node for rk3576.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Link: https://lore.kernel.org/r/20241231095728.253943-3-andyshrk@163.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Add VOP and VOP_MMU found on rk3576.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Link: https://lore.kernel.org/r/20241231095728.253943-2-andyshrk@163.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Devicetree bindings for ES8388 audio codec expect the device to be
marked as compatible with ES8328.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250304104200.76178-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Devicetree bindings for ES8388 audio codec expect the device to be
marked as compatible with ES8328.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250304104200.76178-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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