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bootph-all as phase tag was added to dt-schema
(dtschema/schemas/bootph.yaml) to describe various node usage during
boot phases with DT. Add bootph-all for all nodes that are used in the
bootloader on Renesas R-Car SoCs.
All SoC require CPG clock and its input clock, RST Reset, PFC pin
control and PRR ID register access during all stages of the boot
process, those are marked using bootph-all property, and so is the SoC
bus node which contains these IP.
Each board console UART is also marked as bootph-all to make it
available in all stages of the boot process.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250209180616.160253-2-marek.vasut+renesas@mailbox.org
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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bootph-all as phase tag was added to dt-schema
(dtschema/schemas/bootph.yaml) to describe various node usage during
boot phases with DT. Add bootph-all for all nodes that are used in the
bootloader on Renesas R-Car Gen2 SoCs.
All SoC require CPG clock and its input clock, RST Reset, PFC pin
control and PRR ID register access during all stages of the boot
process, those are marked using bootph-all property, and so is the SoC
bus node which contains these IP.
Each board console UART is also marked as bootph-all to make it
available in all stages of the boot process.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250209180616.160253-1-marek.vasut+renesas@mailbox.org
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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The symbolic names for the line-orders are now available in
<dt-bindings/media/video-interfaces.h>. Switch to them instead of using
their numerical values.
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250205103311.668768-1-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Current ulcb/kf of -mix+split.dtsi is using TDM Split Mode, but only for
playback. Use TDM Split Mode on capture too.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/875xlrshp5.wl-kuninori.morimoto.gx@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Add basic support for the MYIR Remi Pi (based on r9a07g044l2):
- UART,
- I2C,
- eMMC,
- USB host,
- HDMI output,
- Ethernet.
Signed-off-by: Julien Massot <julien.massot@collabora.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250131-myir-remi-pi-v3-2-2dda53e79291@collabora.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Add OPP table for the Renesas RZ/G3S SoC.
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250128145616.2691841-1-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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SoC identification needs the System Controller. Enable it.
Signed-off-by: John Madieu <john.madieu.xa@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250123170508.13578-10-john.madieu.xa@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Add a node for the System Controller to the RZ/G3E (R9A09G047) SoC DTSI,
as it is also required for SoC identification.
Signed-off-by: John Madieu <john.madieu.xa@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250123170508.13578-9-john.madieu.xa@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Enable the System Controller. It is needed for SoC identification.
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Signed-off-by: John Madieu <john.madieu.xa@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250123170508.13578-8-john.madieu.xa@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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The Renesas Ethernet Switch has three independent ports. Each port can
act as a separate interface, and can be enabled or disabled
independently. Currently all ports are enabled by default, hence board
DTS files that enable the switch must disable all unused ports
explicitly.
Disable all ports by default, and explicitly enable ports that are used,
next to their configuration.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Link: https://lore.kernel.org/c4688de8e3289ad82c2cd85f0893eac660ac8890.1737649969.git.geert+renesas@glider.be
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Add a DT overlay for SCIF1 (of the Renesas RZ/G3S SoC) routed through
the PMOD1_3A interface available on the Renesas RZ SMARC Carrier II
board.
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250120130936.1080069-5-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Enable SCIF3. It is routed to the SER1_UART interface on the RZ SMARC
Carrier II board.
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250120130936.1080069-4-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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different switches
There are different switches available on both the RZ/G3S SMARC Module and
RZ SMARC Carrier II boards. These switches are used to route different SoC
signals to different parts available on board.
These switches are described in device trees through macros. These macros
are set accordingly such that the resulted compiled dtb to describe the
on-board switches states.
The SCIF1 depends on the state of the SW_CONFIG3 and SW_OPT_MUX4 switches.
SCIF1 can be enabled through a device tree overlay. To manage all switches
in a unified state and allow users to configure the output device tree, add
a file that contains all switch definitions and states.
Commit prepares the code to enable SCIF1 on the RZ/G3S overlay.
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250120130936.1080069-3-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Numerical by unit address, but grouped by type.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/ccd215c1146b84c085908e01966f7036be51afa8.1737370801.git.geert+renesas@glider.be
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Each rswitch port TSNn has a dedicated MAC address assigned to it, so
does AVB MAC. The MAC addresses for each rswitch port and AVB, four in
total, are stored in the FPGA populated on the board and can be read out
via I2C from bus i2c@e66e0000 address 0x70 offsets 0x58 for AVB and
0x60, 0x68, 0x70 for TSNn.
There is no single MAC address assigned to the rswitch itself, there are
three of them, one for each rswitch port. Instead of ethernet0 alias
for rswitch itself, describe aliases ethernet0, ethernet1 for each
enabled rswitch port. This allows U-Boot to insert MAC addresses from
its environment variables ethaddr/eth1addr/eth2addr into each rswitch
port nodes, so Linux can read and use one unique MAC address for each
rswitch port.
Note that it is unlikely this would break existing rswitch driver
operation in the Linux kernel, because as of right now, the rswitch
driver already calls of_get_ethdev_address() for each port to read
out the MAC address of each rswitch port DT node. If that is missing,
it falls back to MAC address settings read from the hardware itself.
If that also fails, it uses a random MAC address.
Fixes: 412f2224b3b6 ("arm64: dts: renesas: s4sk: Fix ethernet0 alias")
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250118111344.361617-5-marek.vasut+renesas@mailbox.org
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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The rswitch has three independent ports which each can act as a separate
interface with its own MAC address. Describe DT aliases ethernet0,
ethernet1, ethernet2 for each rswitch port in DT. This allows U-Boot to
insert MAC addresses from its environment variables
ethaddr/eth1addr/eth2addr into each rswitch port nodes, so Linux can
read and use one unique MAC address for each rswitch port.
Note that it is unlikely this would break existing rswitch driver
operation in the Linux kernel, because as of right now, the rswitch
driver already calls of_get_ethdev_address() for each port to read
out the MAC address of each rswitch port DT node. If that is missing,
it falls back to MAC address settings read from the hardware itself.
If that also fails, it uses a random MAC address.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250118111344.361617-4-marek.vasut+renesas@mailbox.org
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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The r8a779f0.dtsi now contains labels for each rswitch port in the form
'rswitch_portN'. Use those to access rswitch ports and slightly reduce
the depth of this board DT. No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250118111344.361617-3-marek.vasut+renesas@mailbox.org
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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The r8a779f0.dtsi now contains labels for each rswitch port in the form
'rswitch_portN'. Use those to access rswitch ports and slightly reduce
the depth of this board DT. No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250118111344.361617-2-marek.vasut+renesas@mailbox.org
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Introduce labels for each rswitch port in the form 'rswitch_portN'.
Those can be used to access rswitch port nodes directly, which is going
to be useful in reducing DT indentation slightly as well as in the DT
/aliases node to reference the rswitch ports as ethernetN interfaces.
No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250118111344.361617-1-marek.vasut+renesas@mailbox.org
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Add basic support for the Yuridenki-Shokai Kakip board based on
R9A09G057H48, including:
- Memory
- OSTM0 - OSTM7
- Pin Control
- Input clocks
- SCIF
- SDHI0
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250116144752.1738574-5-iwamatsu@nigauri.org
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Bindings expect GPIO hog names to end with 'hog' suffix, so correct it
to fix dtbs_check warning:
r8a77970-eagle-function-expansion.dtb: gpio@27: 'vin0_adv7612_en' does not match any of the regexes: '^(hog-[0-9]+|.+-hog(-[0-9]+)?)$', 'pinctrl-[0-9]+'
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250115211755.194219-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Add device node for the VSPX instance on R-Car V4M.
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250115181050.3728275-3-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Add device node for the FCPVX instance on R-Car V4M.
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250115181050.3728275-2-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Enable WDT1 watchdog on RZ/G3E SMARC SoM platform.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250115103858.104709-6-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Add WDT1-WDT3 nodes to RZ/G3E ("R9A09G047") SoC DTSI.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250115103858.104709-5-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Alphabetical by label name.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/4f3e057b9a73d7ee7ff073f51bb9a4c30bdd0c84.1736506813.git.geert+renesas@glider.be
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Add device nodes for the VSPX instances on R-Car V3U.
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250109125433.2402045-3-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Add device nodes for the FCPVX instances on R-Car V3U.
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250109125433.2402045-2-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Describe the two Marvell 88Q2110/QFN40 PHYs available on the R-Car V4M
Gray Hawk single-board. The two PHYs are wired up on the board by
default.
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250107160127.528933-3-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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When describing the PHYs connected to AVB1 and AVB2, mdio nodes will be
needed to describe the connections, and each mdio node will need to
contain these two properties instead. This will make the #address-cells
and #size-cells described in the base SoC include file redundant and
they will produce warnings, remove them.
In an effort to keep all three AVB nodes style consistent add an mdio
node to AVB0 already described and rename the phy node to better
describe the PHY that is connected to AVB0 before adding more PHYs.
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250107160127.528933-2-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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When CONFIG_ENERGY_MODEL=y:
cpu cpu0: EM: invalid perf. state: -22
When removing the (incorrect) voltages from the Operating Points
Parameters tables, it was assumed they were optional, and unused, when
none of the CPU nodes is tied to a regulator using the "cpu-supply"
property. This assumption turned out to be incorrect, causing the
reported error message.
Fix this by re-adding the (correct) voltages. Note that because all
voltages are identical, all operating points are considered to have the
same efficiency, and the energy model always picks the one with the
highest clock rate.
Reported-by: Renesas Test Team via Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Fixes: fb76b0fae3ca8803 ("arm64: dts: renesas: r8a77990: Remove bogus voltages from OPP table")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/80890bc244670bc3e8d6fc89fb2c3cb23e7025f5.1728377971.git.geert+renesas@glider.be
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When CONFIG_ENERGY_MODEL=y:
cpu cpu0: EM: invalid perf. state: -22
When removing the (incorrect) voltages from the Operating Points
Parameters tables, it was assumed they were optional, and unused, when
none of the CPU nodes is tied to a regulator using the "cpu-supply"
property. This assumption turned out to be incorrect, causing the
reported error message.
Fix this by re-adding the (correct) voltages. Note that because all
voltages are identical, all operating points are considered to have the
same efficiency, and the energy model always picks the one with the
highest clock rate.
Reported-by: Renesas Test Team via Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Fixes: 554edc3e9239bb81 ("arm64: dts: renesas: r8a774c0: Remove bogus voltages from OPP table")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/2046da75f3db95b62f86c0482063c4d04c2b47d5.1728377971.git.geert+renesas@glider.be
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Bindings expect GPIO hog names to end with 'hog' suffix, so correct it
to fix dtbs_check warning:
vf610-zii-dev-rev-c.dtb: eth0_intrp: $nodename:0: 'eth0_intrp' does not match '^.+-hog(-[0-9]+)?$'
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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All known M1* and M2* devices use an identical SPI NOR flash
configuration with a partition containing a non-volatile key:value
storage. Use a .dtsi and include it for every device.
The nvram partition parameters itself depend on the version of the
installed Apple iboot boot loader. m1n1 will fill in the current values
provided by Apple's iboot.
Reviewed-by: Neal Gompa <neal@gompa.dev>
Signed-off-by: Janne Grunau <j@jannau.net>
Link: https://lore.kernel.org/r/20241203-asahi-spi-dt-v2-5-cd68bfaf0c84@jannau.net
Signed-off-by: Sven Peter <sven@svenpeter.dev>
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Apple silicon devices have one or more SPI devices. Add device tree
nodes for all known controllers. The missing ones could be guessed and
tested with a little effort but since the devices expose no pins and
no new devices are expected there is no point in spending the effort.
SPI is used for spi-nor and input devices like keyboard, trackpad,
touchscreen and fingerprint reader. Only the spi-nor flash has upstream
drivers. Support for it will be added in a following commit.
Reviewed-by: Neal Gompa <neal@gompa.dev>
Signed-off-by: Janne Grunau <j@jannau.net>
Link: https://lore.kernel.org/r/20241203-asahi-spi-dt-v2-4-cd68bfaf0c84@jannau.net
Signed-off-by: Sven Peter <sven@svenpeter.dev>
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Apple silicon devices have one or more SPI devices. Add device tree
nodes for all known controllers. The missing ones could be guessed and
tested with a little effort but since the devices expose no pins and
no new devices are expected there is no point in spending the effort.
SPI is used for spi-nor and input devices like keyboard, trackpad,
touchscreen and fingerprint reader. Only the spi-nor flash has upstream
drivers. Support for it will be added in a following commit.
Reviewed-by: Neal Gompa <neal@gompa.dev>
Signed-off-by: Janne Grunau <j@jannau.net>
Link: https://lore.kernel.org/r/20241203-asahi-spi-dt-v2-3-cd68bfaf0c84@jannau.net
Signed-off-by: Sven Peter <sven@svenpeter.dev>
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Apple silicon devices have one or more SPI devices. Add device tree
nodes for all known controllers. The missing ones could be guessed and
tested with a little effort but since the devices expose no pins and
no new devices are expected there is no point in spending the effort.
SPI is used for spi-nor and input devices like keyboard, trackpad,
touchscreen and fingerprint reader. Only the spi-nor flash has upstream
drivers. Support for it will be added in a following commit.
Reviewed-by: Neal Gompa <neal@gompa.dev>
Signed-off-by: Janne Grunau <j@jannau.net>
Link: https://lore.kernel.org/r/20241203-asahi-spi-dt-v2-2-cd68bfaf0c84@jannau.net
Signed-off-by: Sven Peter <sven@svenpeter.dev>
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Signed-off-by: Hector Martin <marcan@marcan.st>
Reviewed-by: Neal Gompa <neal@gompa.dev>
Link: https://lore.kernel.org/r/20241203-asahi-spi-dt-v2-1-cd68bfaf0c84@jannau.net
Signed-off-by: Sven Peter <sven@svenpeter.dev>
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Add missing CPU p-state 7 @ 1512 MHz for iPad mini 4.
Fixes: e97323994f4a ("arm64: dts: apple: t7000: Add cpufreq nodes")
Signed-off-by: Nick Chan <towinchenmi@gmail.com>
Link: https://lore.kernel.org/r/20250217-mini4-cpufreq-v1-1-8974e90dd806@gmail.com
Signed-off-by: Sven Peter <sven@svenpeter.dev>
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On the i.MX5 chips the peripheral interrupts are represented directly only
by their interrupt numbers.
The CCM nodes are not following this format and cause the following
dt-schema warnings:
ccm@73fd4000: interrupts: [[0], [71], [4], [0], [72], [4]] is too long
Fix it by passing only the two interrupt numbers.
Run-time tested in on an imx53-qsb board.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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According to fsl,sec-v4.0.yaml, the job ring node names
should be 'jr'.
Change them to fix the following dt-schema warnings:
crypto@400f0000: 'jr0@1000', 'jr1@2000' do not match any of the regexes:
'^jr@[0-9a-f]+$', '^rtic@[0-9a-f]+$', 'pinctrl-[0-9]+'
Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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This change fixes these dtbs_check errors for audio-codec:
1. pmic: 'mt6359codec' does not match any of the regexes: 'pinctrl-[0-9]+'
- Replace device node name to generic 'audio-codec'
2. pmic: regulators: 'compatible' is a required property
- Add 'mediatek,mt6359-codec' to compatible.
Fixes: 3b7d143be4b7 ("arm64: dts: mt6359: add PMIC MT6359 related nodes")
Signed-off-by: Macpaul Lin <macpaul.lin@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20250217113736.1867808-1-macpaul.lin@mediatek.com
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
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According to atmel,maxtouch.yaml, the correct property that describes
the GPIO connected to the touchscreen reset line is 'reset-gpios'.
Change it accordingly to fix the following dt-schema warning:
'reset-gpio' does not match any of the regexes: 'pinctrl-[0-9]+'
Signed-off-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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fsl,imx-iomuxc-gpr.yaml only contains the mux-controller but the actual
video-mux is not part of it. So move it below root node.
Fixes the dtbs_check warning:
arch/arm/boot/dts/nxp/imx/imx7s-mba7.dtb: iomuxc-gpr@30340000: 'csi-mux' does not match any of the regexes: 'pinctrl-[0-9]+'
from schema $id: http://devicetree.org/schemas/soc/imx/fsl,imx-iomuxc-gpr.yaml#
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Add initial support for the Milk-V Jupiter board [1], which is a Mini ITX
computer based on the SpacemiT K1/M1 Octa-Core X60 64-bit RISC-V SoC [2].
There are two variant for this board, one using the K1 chip and another
using the M1 chip. The main difference is that the M1 can run at a higher
frequency than the K1, thanks to its packaging.
For now, only a DTS for the K1 variant is added since there isn't support
yet for the X60 cores operating performance and thermal trip points.
The support is minimal, but at least allows to boot into a serial console.
Link: https://milkv.io/jupiter [1]
Link: https://www.spacemit.com/en/key-stone-k1 [2]
Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
Reviewed-by: Yixun Lan <dlan@gentoo.org>
Link: https://lore.kernel.org/r/20250214151700.666544-3-javierm@redhat.com
Signed-off-by: Yixun Lan <dlan@gentoo.org>
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Document the compatible string for Milk-V Jupiter board [1], which
is a Mini ITX computer based on the SpacemiT K1/M1 RISC-V SoC [2].
Link: https://milkv.io/jupiter [1]
Link: https://www.spacemit.com/en/key-stone-k1 [2]
Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Matthias Brugger <mbrugger@suse.com>
Reviewed-by: Yixun Lan <dlan@gentoo.org>
Link: https://lore.kernel.org/r/20250214151700.666544-2-javierm@redhat.com
Signed-off-by: Yixun Lan <dlan@gentoo.org>
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This board has one Type-C port which has USB3 capability. This will
add typec nodes and enable usb3 node.
Signed-off-by: Xu Yang <xu.yang_2@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Add usb3 phy and controller nodes for imx95.
Signed-off-by: Xu Yang <xu.yang_2@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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The btt3 device' HW revisions from 0 to 2 use imx287 SoC and are to
some extend similar to already upstreamed XEA devices, hence are
using common imx28-lwe.dtsi file.
New, imx28-btt3.dtsi has been added to embrace common DTS
properties for different HW revisions for this device.
As a result - changes introduced in imx28-btt3-[012].dts are
minimal.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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The imx287 based btt3 board is very similar to xea in terms of used SOM
module.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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