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cache
Age
Commit message (
Expand
)
Author
2025-11-21
cache: Support cache maintenance for HiSilicon SoC Hydra Home Agent
Yushan Wang
2025-11-21
cache: Make top level Kconfig menu a boolean dependent on RISCV
Jonathan Cameron
2025-09-11
cache: sifive_ccache: Optimize cache flushes
Samuel Holland
2025-04-07
cache: sifive_ccache: Add ESWIN EIC7700 support
Pinkesh Vaghela
2024-08-01
cache: StarFive: Require a 64-bit system
Palmer Dabbelt
2024-05-28
cache: Add StarFive StarLink cache management
Joshua Yeong
2024-04-11
cache: sifive_ccache: Silence unused variable warning
Samuel Holland
2024-03-28
cache: sifive_ccache: Partially convert to a platform driver
Samuel Holland
2024-02-21
cache: ax45mp_cache: Align end size to cache boundary in ax45mp_dma_cache_wba...
Lad Prabhakar
2023-11-22
soc: sifive: ccache: Add StarFive JH7100 support
Emil Renner Berthing
2023-11-22
soc: sifive: shunt ccache driver to drivers/cache
Conor Dooley
2023-10-26
riscv: RISCV_NONSTANDARD_CACHE_OPS shouldn't depend on RISCV_DMA_NONCOHERENT
Christoph Hellwig
2023-09-01
cache: Add L2 cache management for Andes AX45MP RISC-V core
Lad Prabhakar