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2023-03-22mtd: rawnand: hynix: fix up bit 0 of sdr_timing_modeHector Palacios
According to the ONFI specification, bit 0 of 'SDR timing mode support' (bytes 129-130) "shall be 1". That means the NAND supports at least timing mode 0. NAND chip Hynix H27U4G8F2GDA-BI (at least) is reading a 0 on this field which makes nand_choose_best_sdr_timings() return with error and the probe function to eventually fail. Given that sdr_timing_modes bit 0 must be 1 by specification, force it in case the NAND reports it is not set. This is a safe assumption because the mode 0 is the minimum (safer) set of timings that the NAND can work with. Signed-off-by: Hector Palacios <hector.palacios@digi.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20230223165104.525852-1-hector.palacios@digi.com Link: https://lore.kernel.org/linux-mtd/20230310080609.1930869-1-hector.palacios@digi.com
2023-03-22mtd: Use of_property_read_bool() for boolean propertiesRob Herring
It is preferred to use typed property access functions (i.e. of_property_read_<type> functions) rather than low-level of_get_property/of_find_property functions for reading properties. Convert reading boolean properties to to of_property_read_bool(). Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20230310144716.1543995-1-robh@kernel.org
2023-03-22mtd: rawnand: meson: invalidate cache on polling ECC bitArseniy Krasnov
'info_buf' memory is cached and driver polls ECC bit in it. This bit is set by the NAND controller. If 'usleep_range()' returns before device sets this bit, 'info_buf' will be cached and driver won't see update of this bit and will loop forever. Fixes: 8fae856c5350 ("mtd: rawnand: meson: add support for Amlogic NAND flash controller") Signed-off-by: Arseniy Krasnov <AVKrasnov@sberdevices.ru> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/d4ef0bd6-816e-f6fa-9385-f05f775f0ae2@sberdevices.ru
2023-03-22mtd: rawnand: nandsim: Artificially prevent sequential page readsMiquel Raynal
The continuous read support added recently makes nandsim unhappy. Indeed, all the supported commands should be re-encoded into internal commands, so of course there is currently no support for the commands and patterns needed for continuous reads to work. I tried to add support for them but nandsim (which is more a tool to develop/debug upper layers rather than the raw NAND core) suffers from a big limitation: it's internal parser needs to know what exact operation is happening when the address cycles are performed. The research is then sequential from the start up to the address cycles, but does not check what's coming next even though the information is available. This is a limitation which is related to the old API used by the core which kind of forced the controllers to guess what operation was being performed rather early. Today the core uses a more transparent API called ->exec_op() which no longer requires controller drivers to do any more guessing, but despite being updated to ->exec_op(), nandsim is still a bit constrained on this regard and thus cannot handle sequential page reads because the start sequence beginning is identical to a regular page read. If the internal algorithm is updated some day, it should be possible to make it support sequential page reads by adding something like: /* Large page devices continuous read page start */ {OPT_LARGEPAGE, {STATE_CMD_READ0, STATE_ADDR_PAGE, STATE_CMD_READSTART, STATE_CMD_READCACHESEQ | ACTION_CPY, STATE_DATAOUT, STATE_READY}}, /* Large page devices continuous read page continue */ {OPT_LARGEPAGE, {STATE_CMD_READCACHESEQ | ACTION_CPY_NEXT, STATE_DATAOUT, STATE_READY}}, /* Large page devices continuous read page end */ {OPT_LARGEPAGE, {STATE_CMD_READCACHEEND | ACTION_CPY_NEXT, STATE_DATAOUT, STATE_READY}}, For now, we just return -EOPNOTSUPP when the core asks controller drivers if they support the feature in order to prevent any further use of these opcodes. Note: This is a hack, ->exec_op() is not supposed to check against the COMMAND opcodes unless _really_ needed. Fixes: 003fe4b9545b ("mtd: rawnand: Support for sequential cache reads") Reported-by: Zhihao Cheng <chengzhihao1@huawei.com> Link: https://lore.kernel.org/linux-mtd/fd34fe55-7f4a-030d-8653-9bb9cf08410d@huawei.com/ Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Tested-by: Zhihao Cheng <chengzhihao1@huawei.com> Acked-by: Richard Weinberger <richard@nod.at> Link: https://lore.kernel.org/linux-mtd/20230310085452.1368716-1-miquel.raynal@bootlin.com
2023-03-07mtd: nand: raw: qcom_nandc: Use devm_platform_get_and_ioremap_resource()Md Sadre Alam
Convert platform_get_resource(), devm_ioremap_resource() to a single call to devm_platform_get_and_ioremap_resource(), as this is exactly what this function does. Signed-off-by: Md Sadre Alam <quic_mdalam@quicinc.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20230306144141.15360-1-quic_mdalam@quicinc.com
2023-03-06mtd: rawnand: meson: initialize struct with zeroesArseniy Krasnov
This structure must be zeroed, because it's field 'hw->core' is used as 'parent' in 'clk_core_fill_parent_index()', but it will be uninitialized. This happens, because when this struct is not zeroed, pointer 'hw' is "initialized" by garbage, which is valid pointer, but points to some garbage. So 'hw' will be dereferenced, but 'core' contains some random data which will be interpreted as a pointer. The following backtrace is result of dereference of such pointer: [ 1.081319] __clk_register+0x414/0x820 [ 1.085113] devm_clk_register+0x64/0xd0 [ 1.088995] meson_nfc_probe+0x258/0x6ec [ 1.092875] platform_probe+0x70/0xf0 [ 1.096498] really_probe+0xc8/0x3e0 [ 1.100034] __driver_probe_device+0x84/0x190 [ 1.104346] driver_probe_device+0x44/0x120 [ 1.108487] __driver_attach+0xb4/0x220 [ 1.112282] bus_for_each_dev+0x78/0xd0 [ 1.116077] driver_attach+0x2c/0x40 [ 1.119613] bus_add_driver+0x184/0x240 [ 1.123408] driver_register+0x80/0x140 [ 1.127203] __platform_driver_register+0x30/0x40 [ 1.131860] meson_nfc_driver_init+0x24/0x30 Fixes: 1e4d3ba66888 ("mtd: rawnand: meson: fix the clock") Signed-off-by: Arseniy Krasnov <AVKrasnov@sberdevices.ru> Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20230227102425.793841-1-AVKrasnov@sberdevices.ru
2023-03-06mtd: rawnand: orion: use devm_platform_ioremap_resource()Ye Xingchen
Convert platform_get_resource(), devm_ioremap_resource() to a single call to devm_platform_ioremap_resource(), as this is exactly what this function does. Signed-off-by: Ye Xingchen <ye.xingchen@zte.com.cn> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/202302101723563685569@zte.com.cn
2023-02-25Merge tag 'mtd/for-6.3' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux Pull MTD updates from Miquel Raynal: "MTD changes: - parsers: ofpart: add workaround for #size-cells 0 - dt-bindings: partitions: Fix partition node name pattern - dataflash: remove duplicate SPI ID table Raw NAND core changes: - Check the data only read pattern only once - Prepare the late addition of supported operation checks - Support for sequential cache reads - Fix nand_chip kdoc Raw NAND driver changes: - Fsl_elbc: Propagate HW ECC settings to HW - Marvell: Add missing layouts - Pasemi: Don't use static data to track per-device state - Sunxi: - Fix the size of the last OOB region - Remove an unnecessary check - Remove an unnecessary check - Clean up chips after failed init - Precompute the ECC_CTL register value - Embed sunxi_nand_hw_ecc by value - Update OOB layout to match hardware - tmio_nand: Remove driver - vf610_nfc: Use regular comments for functions SPI-NAND driver changes: - Add support for AllianceMemory AS5F34G04SND - Macronix: use scratch buffer for DMA operation NAND ECC changes: - Mediatek: - Add ECC support fot MT7986 IC - Add compatible for MT7986 - dt-bindings: Split ECC engine with rawnand controller SPI NOR changes: - Misc core fixes SPI NOR driver changes: - Spansion: Minor fixes" * tag 'mtd/for-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux: (33 commits) mtd: parsers: ofpart: add workaround for #size-cells 0 mtd: rawnand: sunxi: Precompute the ECC_CTL register value mtd: rawnand: sunxi: Embed sunxi_nand_hw_ecc by value mtd: rawnand: sunxi: Update OOB layout to match hardware mtd: spi-nor: Sort headers alphabetically mtd: spi-nor: Fix shift-out-of-bounds in spi_nor_set_erase_type mtd: nand: ecc-mtk: Add ECC support fot MT7986 IC dt-bindings: mtd: mediatek,nand-ecc-engine: Add compatible for MT7986 dt-bindings: mtd: Split ECC engine with rawnand controller mtd: rawnand: fsl_elbc: Propagate HW ECC settings to HW mtd: spinand: Add support for AllianceMemory AS5F34G04SND dt-bindings: mtd: partitions: Fix partition node name pattern mtd: spi-nor: Create macros to define chip IDs and geometries mtd: spi-nor: spansion: Make CFRx reg fields generic mtd: spi-nor: spansion: Consider reserved bits in CFR5 register mtd: spi-nor: core: fix implicit declaration warning mtd: spinand: macronix: use scratch buffer for DMA operation mtd: rawnand: Fix nand_chip kdoc mtd: rawnand: vf610_nfc: use regular comments for functions mtd: rawnand: Support for sequential cache reads ...
2023-02-06mtd: rawnand: sunxi: Precompute the ECC_CTL register valueSamuel Holland
The value computed by this function never changes for a given chip. Compute the whole register value once up front, instead of every time the ECC engine is enabled. Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20230204143520.9682-4-samuel@sholland.org
2023-02-06mtd: rawnand: sunxi: Embed sunxi_nand_hw_ecc by valueSamuel Holland
The sunxi_nand_hw_ecc object is not shared, and it has the same lifetime as the sunxi_nand_chip which points to it, so we can embed it in the outer structure instead of using a pointer. This removes an unnecessary memory allocation and simplifies the error handling code. Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20230204143520.9682-3-samuel@sholland.org
2023-02-06mtd: rawnand: sunxi: Update OOB layout to match hardwareSamuel Holland
When using the hardware ECC engine, the OOB data is made available in the NFC_REG_USER_DATA registers, as one 32-bit word per ECC step. Any additional bytes are only accessible through raw reads and software descrambling. For efficiency, and to match the vendor driver, ignore these extra bytes when using hardware ECC. Note that until commit 34569d869532 ("mtd: rawnand: sunxi: Fix the size of the last OOB region"), this extra free area was reported with length zero, so this is not a functional change for any stable kernel user. Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20230204143520.9682-2-samuel@sholland.org
2023-01-30mtd: rawnand: fsl_elbc: Propagate HW ECC settings to HWPali Rohár
It is possible that current chip->ecc.engine_type value does not match to configured HW value (if HW ECC checking and generating is enabled or not). This can happen with old U-Boot bootloader version which either does not initialize NAND (and let it in some default unusable state) or initialize NAND with different parameters than what is specified in kernel DTS file. So if kernel chose to use some chip->ecc.engine_type settings (e.g. from DTS file) then do not depend on bootloader HW configuration and configures HW ECC settings according to chip->ecc.engine_type value. BR_DECC must be set to BR_DECC_CHK_GEN when HW is doing ECC (both generating and checking), or to BR_DECC_OFF when HW is not doing ECC. This change fixes usage of SW ECC support in case bootloader explicitly enabled HW ECC support and kernel DTS file has specified to use SW ECC. (Of course this works only in case when NAND is not a boot device and both bootloader and kernel are loaded from different location, e.g. FLASH NOR.) Fixes: f6424c22aa36 ("mtd: rawnand: fsl_elbc: Make SW ECC work") Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20230128134111.32559-1-pali@kernel.org
2023-01-16ARM: s3c: remove s3c24xx specific hacksArnd Bergmann
A number of device drivers reference CONFIG_ARM_S3C24XX_CPUFREQ or similar symbols that are no longer available with the platform gone, though the drivers themselves are still used on newer platforms, so remove these hacks. Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Stephen Boyd <sboyd@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-01-13mtd: rawnand: vf610_nfc: use regular comments for functionsRandy Dunlap
These comments are not quite in kernel-doc format and they don't need to be, so just use "/*" comment markers for them. This prevents these kernel-doc warnings: drivers/mtd/nand/raw/vf610_nfc.c:210: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst * Read accessor for internal SRAM buffer drivers/mtd/nand/raw/vf610_nfc.c:245: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst * Write accessor for internal SRAM buffer Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Cc: Stefan Agner <stefan@agner.ch> Cc: Miquel Raynal <miquel.raynal@bootlin.com> Cc: Richard Weinberger <richard@nod.at> Cc: Vignesh Raghavendra <vigneshr@ti.com> Cc: linux-mtd@lists.infradead.org Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20230113064004.24391-1-rdunlap@infradead.org
2023-01-13mtd: rawnand: Support for sequential cache readsJaimeLiao
Add support for sequential cache reads for controllers using the generic core helpers for their fast read/write helpers. Sequential reads may reduce the overhead when accessing physically continuous data by loading in cache the next page while the previous page gets sent out on the NAND bus. The ONFI specification provides the following additional commands to handle sequential cached reads: * 0x31 - READ CACHE SEQUENTIAL: Requires the NAND chip to load the next page into cache while keeping the current cache available for host reads. * 0x3F - READ CACHE END: Tells the NAND chip this is the end of the sequential cache read, the current cache shall remain accessible for the host but no more internal cache loading operation is required. On the bus, a multi page read operation is currently handled like this: 00 -- ADDR1 -- 30 -- WAIT_RDY (tR+tRR) -- DATA1_IN 00 -- ADDR2 -- 30 -- WAIT_RDY (tR+tRR) -- DATA2_IN 00 -- ADDR3 -- 30 -- WAIT_RDY (tR+tRR) -- DATA3_IN Sequential cached reads may instead be achieved with: 00 -- ADDR1 -- 30 -- WAIT_RDY (tR) -- \ 31 -- WAIT_RDY (tRCBSY+tRR) -- DATA1_IN \ 31 -- WAIT_RDY (tRCBSY+tRR) -- DATA2_IN \ 3F -- WAIT_RDY (tRCBSY+tRR) -- DATA3_IN Below are the read speed test results with regular reads and sequential cached reads, on NXP i.MX6 VAR-SOM-SOLO in mapping mode with a NAND chip characterized with the following timings: * tR: 20 µs * tRCBSY: 5 µs * tRR: 20 ns and the following geometry: * device size: 2 MiB * eraseblock size: 128 kiB * page size: 2 kiB ============= Normal read @ 33MHz ================= mtd_speedtest: eraseblock read speed is 15633 KiB/s mtd_speedtest: page read speed is 15515 KiB/s mtd_speedtest: 2 page read speed is 15398 KiB/s =================================================== ========= Sequential cache read @ 33MHz =========== mtd_speedtest: eraseblock read speed is 18285 KiB/s mtd_speedtest: page read speed is 15875 KiB/s mtd_speedtest: 2 page read speed is 16253 KiB/s =================================================== We observe an overall speed improvement of about 5% when reading 2 pages, up to 15% when reading an entire block. This is due to the ~14us gain on each additional page read (tR - (tRCBSY + tRR)). Co-developed-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: JaimeLiao <jaimeliao.tw@gmail.com> Tested-by: Liao Jaime <jaimeliao.tw@gmail.com> Link: https://lore.kernel.org/linux-mtd/20230112093637.987838-4-miquel.raynal@bootlin.com
2023-01-13mtd: rawnand: Prepare the late addition of supported operation checksMiquel Raynal
Add an empty envelope just to show how to add additional checks for new operations. This is going to be used for sequential cached reads, which require the page size to be known (and the discovery to be over), hence the "late" designation. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Tested-by: Liao Jaime <jaimeliao.tw@gmail.com> Link: https://lore.kernel.org/linux-mtd/20230112093637.987838-3-miquel.raynal@bootlin.com
2023-01-13mtd: rawnand: Check the data only read pattern only onceMiquel Raynal
Instead of checking if a pattern is supported each time we need it, let's create a bitfield that only the core would be allowed to fill at startup time. The core and the individual drivers may then use it in order to check what operation they should use. This bitfield is supposed to grow over time. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Tested-by: Liao Jaime <jaimeliao.tw@gmail.com> Link: https://lore.kernel.org/linux-mtd/20230112093637.987838-2-miquel.raynal@bootlin.com
2023-01-07mtd: remove tmio_nand driverArnd Bergmann
With the TMIO MFD drivers gone, the NAND support is also obsolete and can be removed. Cc: Miquel Raynal <miquel.raynal@bootlin.com> Cc: Richard Weinberger <richard@nod.at> Cc: Vignesh Raghavendra <vigneshr@ti.com> Cc: linux-mtd@lists.infradead.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2023-01-07mtd: rawnand: pasemi: Don't use static data to track per-device stateUwe Kleine-König
Up to now the pasemi nand driver only supported a single device instance. However the check for that was racy because two parallel calls of pasemi_nand_probe() could pass the check if (pasemi_nand_mtd) return -ENODEV; before any of them assigns a non-NULL value to it. So rework the driver to make use of per-device driver data. As an intended side effect the driver can bind more than one device and also gets rid of the check if (!pasemi_nand_mtd) return 0; in the remove callback that could only ever trigger after the above race happened. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20230102124051.1508424-1-u.kleine-koenig@pengutronix.de
2023-01-02mtd: rawnand: sunxi: Fix the size of the last OOB regionSamuel Holland
The previous code assigned to the wrong structure member. Fixes: c66811e6d350 ("mtd: nand: sunxi: switch to mtd_ooblayout_ops") Signed-off-by: Samuel Holland <samuel@sholland.org> Acked-By: Dhruva Gole <d-gole@ti.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20221229181526.53766-6-samuel@sholland.org
2023-01-02mtd: rawnand: sunxi: Remove an unnecessary checkSamuel Holland
Each chip is required to have a unique CS number ("reg" property) in the range 0-7, so there is no need to separately count the number of chips. Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20221229181526.53766-4-samuel@sholland.org
2023-01-02mtd: rawnand: sunxi: Remove an unnecessary checkSamuel Holland
sunxi_nand->nsels cannot be zero, so the second check implies the first. Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20221229181526.53766-3-samuel@sholland.org
2023-01-02mtd: rawnand: sunxi: Clean up chips after failed initSamuel Holland
If a chip fails to initialize, we need to clean up any chips that were already initialized/registered. Fixes: 1fef62c1423b ("mtd: nand: add sunxi NAND flash controller support") Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20221229181526.53766-2-samuel@sholland.org
2023-01-02mtd: rawnand: marvell: add missing layoutsAviram Dali
A missing layouts were added to the driver to support NAND flashes with ECC layouts of 12 or 16 with page sized of 2048, 4096 or 8192. Usually theses are rare layouts, but in Marvell AC5 driver, the ECC level is set according to the spare area, so we may use these layouts more frequently. Signed-off-by: Aviram Dali <aviramd@marvell.com> Signed-off-by: Vadym Kochan <vadym.kochan@plvision.eu> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20221216162715.3230766-1-vadym.kochan@plvision.eu
2022-12-13Merge tag 'mtd/for-6.2' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux Pull mtd updates from Miquel Raynal: "MTD core changes: - Fix refcount error in del_mtd_device() - Fix possible resource leak in init_mtd() - Set ROOT_DEV for partitions marked as rootfs in DT - Describe marking rootfs partitions in the bindings - Fix device name leak when register device fails in add_mtd_device() - Try to find OF node for every MTD partition - simplify (a bit) code find partition-matching dynamic OF node MTD driver changes: - pxa2xx-flash maps: fix memory leak in probe - BCM parser: refer to ARCH_BCMBCA instead of ARCH_BCM4908 - lpddr2_nvm: Fix possible null-ptr-deref - inftlcore: fix repeated words in comments - lart: remove driver - tplink: - Add TP-Link SafeLoader partitions table parser and bindings - Describe TP-Link SafeLoader parser - Describe TP-Link SafeLoader dynamic subpartitions - mtdoops: - Panic caused mtdoops to call mtdoops_erase function immediately - Add mtdoops_erase function and move mtdoops_inc_counter after it - Change printk() to counterpart pr_ functions MTD binding cleanup: - Fixed-partitions: Fix 'sercomm,scpart-id' schema - Standardize the style in the examples - Drop object types when referencing other files - Argue in favor of keeping additionalProperties set to true - NVMEM-cells: - Inherit from MTD partitions - Drop range property from example - Partitions: - Change qcom,smem-part partition type - Constrain the list of parsers - Physmap: Reuse the generic definitions - SPI-NOR: Drop common properties - Sunxi-nand: Add an example to validate the bindings - Onenand: Mention the expected node name - Ingenic: Mark partitions in the controller node as deprecated - NAND: - Standardize the child node name - Drop common properties already defined in generic files - nand-chip.yaml should reference mtd.yaml - Remove useless file about partitions - Clarify all partition subnodes SPI NOR core changes: - Add support for flash reset using the dt reset-gpios property. - Update hwcaps.mask to include 8D-8D-8D read and page program ops when xSPI profile 1.0 table is defined. - Bypass zero erase size in spi_nor_find_best_erase_type(). - Fix select_uniform_erase to skip 0 erase size - Add generic flash driver. If a flash is not found in the flash_info array, fall back to the generic flash driver which is described solely by the flash's SFDP tables. - Fix the number of bytes for the dummy cycles in spi_nor_spimem_check_readop(). - Introduce SPI_NOR_QUAD_PP flag, as PP_1_1_4 is not SFDP discoverable. SPI NOR manufacturer drivers changes: - Spansion: - use PARSE_SFDP for s28hs512t, - add support for s28hl512t, s28hl01gt, and s28hs01gt. - Gigadevice: Replace default_init() with post_bfpt() for gd25q256. - Micron - ST: Enable locking for mt25qu256a. - Winbond: Add support for W25Q512NW-IQ. - ISSI: Use PARSE_SFDP and SPI_NOR_QUAD_PP. Raw NAND core changes: - Drop obsolete dependencies on COMPILE_TEST - MAINTAINERS: rectify entry for MESON NAND controller bindings - Drop EXPORT_SYMBOL_GPL for nanddev_erase() Raw NAND driver changes: - marvell: Enable NFC/DEVBUS arbiter - gpmi: Use pm_runtime_resume_and_get instead of pm_runtime_get_sync - mpc5121: Replace NO_IRQ by 0 - lpc32xx_{slc,mlc}: - Switch to using pm_ptr() - Switch to using gpiod API - lpc32xx_mlc: Switch to using pm_ptr() - cadence: Support 64-bit slave dma interface - rockchip: Describe rk3128-nfc in the bindings - brcmnand: Update interrupts description in the bindings SPI-NAND driver changes: - winbond: - Add Winbond W25N02KV flash support - Fix flash identification" * tag 'mtd/for-6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux: (76 commits) mtd: rawnand: Drop obsolete dependencies on COMPILE_TEST mtd: maps: pxa2xx-flash: fix memory leak in probe mtd: core: Fix refcount error in del_mtd_device() mtd: spi-nor: add SFDP fixups for Quad Page Program mtd: spi-nor: issi: is25wp256: Init flash based on SFDP mtd: spi-nor: winbond: add support for W25Q512NW-IQ mtd: spi-nor: micron-st: Enable locking for mt25qu256a mtd: spi-nor: Fix the number of bytes for the dummy cycles mtd: spi-nor: gigadevice: gd25q256: replace gd25q256_default_init with gd25q256_post_bfpt mtd: spi-nor: Fix formatting in spi_nor_read_raw() kerneldoc comment mtd: spi-nor: sysfs: print JEDEC ID for generic flash driver mtd: spi-nor: add generic flash driver mtd: spi-nor: fix select_uniform_erase to skip 0 erase size mtd: spi-nor: move function declaration out of sfdp.h mtd: spi-nor: remember full JEDEC flash ID mtd: spi-nor: sysfs: hide manufacturer if it is not set mtd: spi-nor: hide jedec_id sysfs attribute if not present mtd: spi-nor: Check for zero erase size in spi_nor_find_best_erase_type() mtd: rawnand: marvell: Enable NFC/DEVBUS arbiter mtd: parsers: refer to ARCH_BCMBCA instead of ARCH_BCM4908 ...
2022-12-12Merge tag 'random-6.2-rc1-for-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/crng/random Pull random number generator updates from Jason Donenfeld: - Replace prandom_u32_max() and various open-coded variants of it, there is now a new family of functions that uses fast rejection sampling to choose properly uniformly random numbers within an interval: get_random_u32_below(ceil) - [0, ceil) get_random_u32_above(floor) - (floor, U32_MAX] get_random_u32_inclusive(floor, ceil) - [floor, ceil] Coccinelle was used to convert all current users of prandom_u32_max(), as well as many open-coded patterns, resulting in improvements throughout the tree. I'll have a "late" 6.1-rc1 pull for you that removes the now unused prandom_u32_max() function, just in case any other trees add a new use case of it that needs to converted. According to linux-next, there may be two trivial cases of prandom_u32_max() reintroductions that are fixable with a 's/.../.../'. So I'll have for you a final conversion patch doing that alongside the removal patch during the second week. This is a treewide change that touches many files throughout. - More consistent use of get_random_canary(). - Updates to comments, documentation, tests, headers, and simplification in configuration. - The arch_get_random*_early() abstraction was only used by arm64 and wasn't entirely useful, so this has been replaced by code that works in all relevant contexts. - The kernel will use and manage random seeds in non-volatile EFI variables, refreshing a variable with a fresh seed when the RNG is initialized. The RNG GUID namespace is then hidden from efivarfs to prevent accidental leakage. These changes are split into random.c infrastructure code used in the EFI subsystem, in this pull request, and related support inside of EFISTUB, in Ard's EFI tree. These are co-dependent for full functionality, but the order of merging doesn't matter. - Part of the infrastructure added for the EFI support is also used for an improvement to the way vsprintf initializes its siphash key, replacing an sleep loop wart. - The hardware RNG framework now always calls its correct random.c input function, add_hwgenerator_randomness(), rather than sometimes going through helpers better suited for other cases. - The add_latent_entropy() function has long been called from the fork handler, but is a no-op when the latent entropy gcc plugin isn't used, which is fine for the purposes of latent entropy. But it was missing out on the cycle counter that was also being mixed in beside the latent entropy variable. So now, if the latent entropy gcc plugin isn't enabled, add_latent_entropy() will expand to a call to add_device_randomness(NULL, 0), which adds a cycle counter, without the absent latent entropy variable. - The RNG is now reseeded from a delayed worker, rather than on demand when used. Always running from a worker allows it to make use of the CPU RNG on platforms like S390x, whose instructions are too slow to do so from interrupts. It also has the effect of adding in new inputs more frequently with more regularity, amounting to a long term transcript of random values. Plus, it helps a bit with the upcoming vDSO implementation (which isn't yet ready for 6.2). - The jitter entropy algorithm now tries to execute on many different CPUs, round-robining, in hopes of hitting even more memory latencies and other unpredictable effects. It also will mix in a cycle counter when the entropy timer fires, in addition to being mixed in from the main loop, to account more explicitly for fluctuations in that timer firing. And the state it touches is now kept within the same cache line, so that it's assured that the different execution contexts will cause latencies. * tag 'random-6.2-rc1-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/crng/random: (23 commits) random: include <linux/once.h> in the right header random: align entropy_timer_state to cache line random: mix in cycle counter when jitter timer fires random: spread out jitter callback to different CPUs random: remove extraneous period and add a missing one in comments efi: random: refresh non-volatile random seed when RNG is initialized vsprintf: initialize siphash key using notifier random: add back async readiness notifier random: reseed in delayed work rather than on-demand random: always mix cycle counter in add_latent_entropy() hw_random: use add_hwgenerator_randomness() for early entropy random: modernize documentation comment on get_random_bytes() random: adjust comment to account for removed function random: remove early archrandom abstraction random: use random.trust_{bootloader,cpu} command line option only stackprotector: actually use get_random_canary() stackprotector: move get_random_canary() into stackprotector.h treewide: use get_random_u32_inclusive() when possible treewide: use get_random_u32_{above,below}() instead of manual loop treewide: use get_random_u32_below() instead of deprecated function ...
2022-12-05Merge tag 'nand/for-6.2' into mtd/nextMiquel Raynal
Raw NAND core changes: * Drop obsolete dependencies on COMPILE_TEST * MAINTAINERS: rectify entry for MESON NAND controller bindings * Drop EXPORT_SYMBOL_GPL for nanddev_erase() Raw NAND driver changes: * marvell: Enable NFC/DEVBUS arbiter * gpmi: Use pm_runtime_resume_and_get instead of pm_runtime_get_sync * mpc5121: Replace NO_IRQ by 0 * lpc32xx_{slc,mlc}: - Switch to using pm_ptr() - Switch to using gpiod API * lpc32xx_mlc: Switch to using pm_ptr() * cadence: Support 64-bit slave dma interface * rockchip: Describe rk3128-nfc in the bindings * brcmnand: Update interrupts description in the bindings SPI-NAND driver changes: * winbond: - Add Winbond W25N02KV flash support - Fix flash identification Fix merge conflict with mtd tree regarding the brcm bindings. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2022-11-25mtd: rawnand: Drop obsolete dependencies on COMPILE_TESTJean Delvare
Since commit 0166dc11be91 ("of: make CONFIG_OF user selectable"), it is possible to test-build any driver which depends on OF on any architecture by explicitly selecting OF. Therefore depending on COMPILE_TEST as an alternative is no longer needed. It is actually better to always build such drivers with OF enabled, so that the test builds are closer to how each driver will actually be built on its intended target. Building them without OF may not test much as the compiler will optimize out potentially large parts of the code. In the worst case, this could even pop false positive warnings. Dropping COMPILE_TEST here improves the quality of our testing and avoids wasting time on non-existent issues. Signed-off-by: Jean Delvare <jdelvare@suse.de> Cc: Miquel Raynal <miquel.raynal@bootlin.com> Cc: Richard Weinberger <richard@nod.at> Cc: Vignesh Raghavendra <vigneshr@ti.com> Cc: Naga Sureshkumar Relli <nagasure@xilinx.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20221124115946.5edb771c@endymion.delvare
2022-11-18treewide: use get_random_u32_inclusive() when possibleJason A. Donenfeld
These cases were done with this Coccinelle: @@ expression H; expression L; @@ - (get_random_u32_below(H) + L) + get_random_u32_inclusive(L, H + L - 1) @@ expression H; expression L; expression E; @@ get_random_u32_inclusive(L, H - + E - - E ) @@ expression H; expression L; expression E; @@ get_random_u32_inclusive(L, H - - E - + E ) @@ expression H; expression L; expression E; expression F; @@ get_random_u32_inclusive(L, H - - E + F - + E ) @@ expression H; expression L; expression E; expression F; @@ get_random_u32_inclusive(L, H - + E + F - - E ) And then subsequently cleaned up by hand, with several automatic cases rejected if it didn't make sense contextually. Reviewed-by: Kees Cook <keescook@chromium.org> Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Reviewed-by: Jason Gunthorpe <jgg@nvidia.com> # for infiniband Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
2022-11-18treewide: use get_random_u32_below() instead of deprecated functionJason A. Donenfeld
This is a simple mechanical transformation done by: @@ expression E; @@ - prandom_u32_max + get_random_u32_below (E) Reviewed-by: Kees Cook <keescook@chromium.org> Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Acked-by: Darrick J. Wong <djwong@kernel.org> # for xfs Reviewed-by: SeongJae Park <sj@kernel.org> # for damon Reviewed-by: Jason Gunthorpe <jgg@nvidia.com> # for infiniband Reviewed-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> # for arm Acked-by: Ulf Hansson <ulf.hansson@linaro.org> # for mmc Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
2022-11-17mtd: rawnand: marvell: Enable NFC/DEVBUS arbiterHamish Martin
The CN9130 SoC (an ARMADA 8K type) has both a NAND Flash Controller and a generic local bus controller (Device Bus Controller) that share common pins. With a board design that incorporates both a NAND flash and uses the Device Bus (in our case for an SRAM) accessing the Device Bus device fails unless the NfArbiterEn bit is set. Setting the bit enables arbitration between the Device Bus and the NAND flash. Since there is no obvious downside in enabling this for designs that don't require arbitration, we always enable it. Signed-off-by: Hamish Martin <hamish.martin@alliedtelesis.co.nz> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20221109231325.7714-1-hamish.martin@alliedtelesis.co.nz
2022-11-07mtd: rawnand: lpc32xx_slc: Switch to using pm_ptr()Geert Uytterhoeven
The switch to using the gpiod API removed the last user of lpc32xx_wp_disable() outside #ifdef CONFIG_PM, causing build failures if CONFIG_PM=n: drivers/mtd/nand/raw/lpc32xx_slc.c:318:13: error: ‘lpc32xx_wp_disable’ defined but not used [-Werror=unused-function] 318 | static void lpc32xx_wp_disable(struct lpc32xx_nand_host *host) | ^~~~~~~~~~~~~~~~~~ Fix this by switching from #ifdef CONFIG_PM to pm_ptr(), increasing compile-coverage as a side-effect. Reported-by: noreply@ellerman.id.au Fixes: 6b923db2867cb5e1 ("mtd: rawnand: lpc32xx_slc: switch to using gpiod API") Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20221027131028.3838303-2-geert@linux-m68k.org
2022-11-07mtd: rawnand: lpc32xx_mlc: Switch to using pm_ptr()Geert Uytterhoeven
The switch to using the gpiod API removed the last user of lpc32xx_wp_disable() outside #ifdef CONFIG_PM, causing build failures if CONFIG_PM=n: drivers/mtd/nand/raw/lpc32xx_mlc.c:380:13: error: ‘lpc32xx_wp_disable’ defined but not used [-Werror=unused-function] 380 | static void lpc32xx_wp_disable(struct lpc32xx_nand_host *host) | ^~~~~~~~~~~~~~~~~~ Fix this by switching from #ifdef CONFIG_PM to pm_ptr(), increasing compile-coverage as a side-effect. Reported-by: noreply@ellerman.id.au Fixes: 782e32a990d9d702 ("mtd: rawnand: lpc32xx_mlc: switch to using gpiod API") Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20221027131028.3838303-1-geert@linux-m68k.org
2022-11-07mtd: rawnand: placate "$VARIABLE is used uninitialized" warningsAdam Borowski
The compiler is not smart enough to notice that it's impossible for them to be actually used uninitialized. Which exact variables trip here varies depending on random surrounding code; none triggered in 6.1-rc1 but 6.1-rc2 fails on three of these five, despite variables declared in the very same line having identical flow. Signed-off-by: Adam Borowski <kilobyte@angband.pl> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20221024092026.42123-1-kilobyte@angband.pl
2022-11-07mtd: rawnand: qcom: handle ret from parse with codeword_fixupChristian Marangi
With use_codeword_fixup enabled, any return from mtd_device_parse_register gets overwritten. Aside from the clear bug, this is also problematic as a parser can EPROBE_DEFER and because this is not correctly handled, the nand is never rescanned later in the bootup process. An example of this problem is when smem requires additional time to be probed and nandc use qcomsmempart as parser. Parser will return EPROBE_DEFER but in the current code this ret gets overwritten by qcom_nand_host_parse_boot_partitions and qcom_nand_host_init_and_register return 0. Correctly handle the return code from mtd_device_parse_register so that any error from this function is not ignored. Fixes: 862bdedd7f4b ("mtd: nand: raw: qcom_nandc: add support for unprotected spare data pages") Cc: stable@vger.kernel.org # v6.0+ Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20221021165304.19991-1-ansuelsmth@gmail.com
2022-10-18mtd: rawnand: cadence: support 64-bit slave dma interfaceValentin Korenblit
32-bit accesses on 64-bit sdma trigger sdma_err in intr_status register. Check dma capabilities before reading/writing from/to sdma interface. Link: https://lore.kernel.org/all/b7e5ebb4-0de8-4958-9bc4-fe06ec4c3635@www.fastmail.com/t/ Signed-off-by: Valentin Korenblit <vkorenblit@sequans.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20221018093000.12072-1-vkorenblit@sequans.com
2022-10-18mtd: rawnand: mpc5121: Replace NO_IRQ by 0Christophe Leroy
NO_IRQ is used to check the return of irq_of_parse_and_map(). On some architecture NO_IRQ is 0, on other architectures it is -1. irq_of_parse_and_map() returns 0 on error, independent of NO_IRQ. So use 0 instead of using NO_IRQ. Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/4e3ca3e0077ea124ea210c312e6e620f0f9e8bca.1665034065.git.christophe.leroy@csgroup.eu
2022-10-18mtd: rawnand: lpc32xx_slc: switch to using gpiod APIDmitry Torokhov
This switches the driver from legacy gpio API to a newer gpiod API. Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20220928230019.2140896-2-dmitry.torokhov@gmail.com
2022-10-18mtd: rawnand: lpc32xx_mlc: switch to using gpiod APIDmitry Torokhov
This switches the driver from legacy gpio API to a newer gpiod API. Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20220928230019.2140896-1-dmitry.torokhov@gmail.com
2022-10-18mtd: rawnand: marvell: Use correct logic for nand-keep-configTony O'Brien
Originally the absence of the marvell,nand-keep-config property caused the setup_data_interface function to be provided. However when setup_data_interface was moved into nand_controller_ops the logic was unintentionally inverted. Update the logic so that only if the marvell,nand-keep-config property is present the bootloader NAND config kept. Cc: stable@vger.kernel.org Fixes: 7a08dbaedd36 ("mtd: rawnand: Move ->setup_data_interface() to nand_controller_ops") Signed-off-by: Tony O'Brien <tony.obrien@alliedtelesis.co.nz> Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20220927024728.28447-1-chris.packham@alliedtelesis.co.nz
2022-10-18mtd: rawnand: tegra: Fix PM disable depth imbalance in probeZhang Qilong
The pm_runtime_enable will increase power disable depth. Thus a pairing decrement is needed on the error handling path to keep it balanced according to context. Cc: stable@vger.kernel.org Fixes: d7d9f8ec77fe9 ("mtd: rawnand: add NVIDIA Tegra NAND Flash controller driver") Signed-off-by: Zhang Qilong <zhangqilong3@huawei.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20220926084456.98160-1-zhangqilong3@huawei.com
2022-10-18mtd: rawnand: intel: Add missing of_node_put() in ebu_nand_probe()Yang Yingliang
The 'chip_np' returned by of_get_next_child() with refcount decremented, of_node_put() need be called in error path to decrease the refcount. Fixes: bfc618fcc3f1 ("mtd: rawnand: intel: Read the chip-select line from the correct OF node") Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20220924131010.957117-1-yangyingliang@huawei.com
2022-10-18mtd: rawnand: gpmi: using pm_runtime_resume_and_get instead of ↵Zhang Qilong
pm_runtime_get_sync Using the newest pm_runtime_resume_and_get is more appropriate for simplifing code here. Signed-off-by: Zhang Qilong <zhangqilong3@huawei.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20220922150654.117568-1-zhangqilong3@huawei.com
2022-10-11treewide: use get_random_bytes() when possibleJason A. Donenfeld
The prandom_bytes() function has been a deprecated inline wrapper around get_random_bytes() for several releases now, and compiles down to the exact same code. Replace the deprecated wrapper with a direct call to the real function. This was done as a basic find and replace. Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Reviewed-by: Kees Cook <keescook@chromium.org> Reviewed-by: Yury Norov <yury.norov@gmail.com> Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu> # powerpc Acked-by: Jakub Kicinski <kuba@kernel.org> Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
2022-10-11treewide: use get_random_{u8,u16}() when possible, part 2Jason A. Donenfeld
Rather than truncate a 32-bit value to a 16-bit value or an 8-bit value, simply use the get_random_{u8,u16}() functions, which are faster than wasting the additional bytes from a 32-bit value. This was done by hand, identifying all of the places where one of the random integer functions was used in a non-32-bit context. Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Reviewed-by: Kees Cook <keescook@chromium.org> Reviewed-by: Yury Norov <yury.norov@gmail.com> Acked-by: Jakub Kicinski <kuba@kernel.org> Acked-by: Heiko Carstens <hca@linux.ibm.com> # for s390 Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
2022-10-11treewide: use prandom_u32_max() when possible, part 1Jason A. Donenfeld
Rather than incurring a division or requesting too many random bytes for the given range, use the prandom_u32_max() function, which only takes the minimum required bytes from the RNG and avoids divisions. This was done mechanically with this coccinelle script: @basic@ expression E; type T; identifier get_random_u32 =~ "get_random_int|prandom_u32|get_random_u32"; typedef u64; @@ ( - ((T)get_random_u32() % (E)) + prandom_u32_max(E) | - ((T)get_random_u32() & ((E) - 1)) + prandom_u32_max(E * XXX_MAKE_SURE_E_IS_POW2) | - ((u64)(E) * get_random_u32() >> 32) + prandom_u32_max(E) | - ((T)get_random_u32() & ~PAGE_MASK) + prandom_u32_max(PAGE_SIZE) ) @multi_line@ identifier get_random_u32 =~ "get_random_int|prandom_u32|get_random_u32"; identifier RAND; expression E; @@ - RAND = get_random_u32(); ... when != RAND - RAND %= (E); + RAND = prandom_u32_max(E); // Find a potential literal @literal_mask@ expression LITERAL; type T; identifier get_random_u32 =~ "get_random_int|prandom_u32|get_random_u32"; position p; @@ ((T)get_random_u32()@p & (LITERAL)) // Add one to the literal. @script:python add_one@ literal << literal_mask.LITERAL; RESULT; @@ value = None if literal.startswith('0x'): value = int(literal, 16) elif literal[0] in '123456789': value = int(literal, 10) if value is None: print("I don't know how to handle %s" % (literal)) cocci.include_match(False) elif value == 2**32 - 1 or value == 2**31 - 1 or value == 2**24 - 1 or value == 2**16 - 1 or value == 2**8 - 1: print("Skipping 0x%x for cleanup elsewhere" % (value)) cocci.include_match(False) elif value & (value + 1) != 0: print("Skipping 0x%x because it's not a power of two minus one" % (value)) cocci.include_match(False) elif literal.startswith('0x'): coccinelle.RESULT = cocci.make_expr("0x%x" % (value + 1)) else: coccinelle.RESULT = cocci.make_expr("%d" % (value + 1)) // Replace the literal mask with the calculated result. @plus_one@ expression literal_mask.LITERAL; position literal_mask.p; expression add_one.RESULT; identifier FUNC; @@ - (FUNC()@p & (LITERAL)) + prandom_u32_max(RESULT) @collapse_ret@ type T; identifier VAR; expression E; @@ { - T VAR; - VAR = (E); - return VAR; + return E; } @drop_var@ type T; identifier VAR; @@ { - T VAR; ... when != VAR } Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Reviewed-by: Kees Cook <keescook@chromium.org> Reviewed-by: Yury Norov <yury.norov@gmail.com> Reviewed-by: KP Singh <kpsingh@kernel.org> Reviewed-by: Jan Kara <jack@suse.cz> # for ext4 and sbitmap Reviewed-by: Christoph Böhmwalder <christoph.boehmwalder@linbit.com> # for drbd Acked-by: Jakub Kicinski <kuba@kernel.org> Acked-by: Heiko Carstens <hca@linux.ibm.com> # for s390 Acked-by: Ulf Hansson <ulf.hansson@linaro.org> # for mmc Acked-by: Darrick J. Wong <djwong@kernel.org> # for xfs Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
2022-10-07Merge tag 'nand/for-6.1' into mtd/nextMiquel Raynal
Raw NAND core changes: * Replace of_gpio_named_count() by gpiod_count() - Remove misguided comment of nand_get_device() - bbt: Use the bitmap API to allocate bitmaps Raw NAND controller drivers changes: * Meson: - Stop supporting legacy clocks - Refine resource getting in probe - Convert bindings to yaml - Fix clock handling and update the bindings accordingly - Fix bit map use in meson_nfc_ecc_correct() * bcm47xx: - Fix spelling typo in comment * STM32 FMC2: - Switch to using devm_fwnode_gpiod_get() - Fix dma_map_sg error check * Cadence: - Remove an unneeded result variable * Marvell: - Fix error handle regarding dma_map_sg * Orion: - Use devm_clk_get_optional() * Cafe: - Use correct function name in comment block * Atmel: - Unmap streaming DMA mappings * Arasan: - Stop using 0 as NULL pointer * GPMI: - Fix typo 'the the' in comment * BRCM: - Add individual glue driver selection - Move Kconfig to driver folder * FSL: Fix none ECC mode * Intel: - Use devm_platform_ioremap_resource_byname() - Remove unused clk_rate member from struct ebu_nand - Remove unused nand_pa member from ebu_nand_cs - Don't re-define NAND_DATA_IFACE_CHECK_ONLY - Remove undocumented compatible string - Fix compatible string in the bindings - Read the chip-select line from the correct OF node - Fix maximum chip select value in the bindings Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2022-09-21mtd: rawnand: meson: stop supporting legacy clocksLiang Yang
meson NFC driver only uses common clock interfaces, which triggers kernel test robot errors when using legacy clocks with HAVE_LEGACY_CLK on. Reported-by: kernel test robot <lkp@intel.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Liang Yang <liang.yang@amlogic.com> [miquel.raynal@bootlin.com: Rephrase the commit log] Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20220907080405.28240-6-liang.yang@amlogic.com
2022-09-21mtd: rawnand: meson: refine resource getting in probeLiang Yang
simply use devm_platform_ioremap_resource_byname() instead of two steps: res = platform_get_resource(pdev, IORESOURCE_MEM, 0) and reg_base = devm_ioremap_resource(dev, res) Reviewed-by: Kevin Hilman <khilman@baylibre.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Liang Yang <liang.yang@amlogic.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20220907080405.28240-4-liang.yang@amlogic.com
2022-09-21mtd: rawnand: meson: fix the clockLiang Yang
EMMC and NAND have the same clock control register named 'SD_EMMC_CLOCK' which is defined in EMMC port internally. bit0~5 of 'SD_EMMC_CLOCK' is the divider and bit6~7 is the mux for fix pll and xtal. At the beginning, a common MMC and NAND sub-clock was discussed and planed to be implemented as NFC clock provider, but now this series of patches of a common MMC and NAND sub-clock are never being accepted. the reasons for giving up are: 1. EMMC and NAND, which are mutually exclusive anyway 2. coupling the EMMC and NAND. 3. it seems that a common MMC and NAND sub-clock is over engineered. and let us see the link fot more information: https://lore.kernel.org/all/20220121074508.42168-5-liang.yang@amlogic.com so The meson nfc can't work now, let us rework the clock. Reviewed-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Liang Yang <liang.yang@amlogic.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20220907080405.28240-3-liang.yang@amlogic.com
generated by cgit (git 2.34.1) at 2025-07-19 05:29:39 +0000