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path: root/drivers/mtd/nand/raw
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2025-05-02Merge tag 'v6.15-rc4' into x86/msr, to pick up fixes and resolve conflictsIngo Molnar
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2025-04-10x86/msr: Rename 'rdmsrl()' to 'rdmsrq()'Ingo Molnar
Suggested-by: "H. Peter Anvin" <hpa@zytor.com> Signed-off-by: Ingo Molnar <mingo@kernel.org> Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: Juergen Gross <jgross@suse.com> Cc: Dave Hansen <dave.hansen@intel.com> Cc: Xin Li <xin@zytor.com> Cc: Linus Torvalds <torvalds@linux-foundation.org>
2025-04-07mtd: rawnand: Add status chack in r852_ready()Wentao Liang
In r852_ready(), the dev get from r852_get_dev() need to be checked. An unstable device should not be ready. A proper implementation can be found in r852_read_byte(). Add a status check and return 0 when it is unstable. Fixes: 50a487e7719c ("mtd: rawnand: Pass a nand_chip object to chip->dev_ready()") Cc: stable@vger.kernel.org # v4.20+ Signed-off-by: Wentao Liang <vulab@iscas.ac.cn> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2025-03-26Merge tag 'mtd/for-6.15' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux Pull mtd updates from Miquel Raynal: "MTD changes: - The atmel,dataflash binding has been converted to yaml and the physmap one constrained. Some logs are improved, error path are getting reworked a bit, few patches target the use of str_enabled_disabled(). Raw NAND changes: - i.MX8 and i.MX31 now have their own compatible, the Qcom driver got cleaned, the Broadcom driver got fixed. SPI NAND changes: - OTP support has been brought, and ESMT and Micron manufacturer drivers implement it. - Read retry, and Macronix manufacturer driver implement it. SPI NOR changes: - Adding support for few flashes. Few cleanup patches for the core driver, where we touched the headers inclusion list and we start using the scope based mutex cleanup helpers. There is also a bunch of minor improvements and fixes in drivers and bindings" * tag 'mtd/for-6.15' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux: (34 commits) dt-bindings: mtd: atmel,dataflash: convert txt to yaml mtd: mchp48l640: Use str_enable_disable() in mchp48l640_write_prepare() mtd: rawnand: gpmi: Use str_enabled_disabled() in gpmi_nand_attach_chip() mtd: mtdpart: Do not supply NULL to printf() dt-bindings: mtd: gpmi-nand: Add compatible string for i.MX8 chips mtd: nand: Fix a kdoc comment mtd: spinand: Improve spinand_info macros style mtd: spi-nor: drop unused <linux/of_platform.h> mtd: spi-nor: explicitly include <linux/of.h> mtd: spi-nor: explicitly include <linux/math64.h> mtd: spi-nor: macronix: add support for mx66{l2, u1}g45g mtd: spi-nor: macronix: Add post_sfdp fixups for Quad Input Page Program mtd: Fix error handling in mtd_device_parse_register() error path mtd: capture device name setting failure when adding mtd mtd: Add check for devm_kcalloc() mtd: Replace kcalloc() with devm_kcalloc() dt-bindings: mtd: physmap: Ensure all properties are defined mtd: rawnand: brcmnand: fix PM resume warning dt-bindings: mtd: mxc-nand: Document fsl,imx31-nand mtd: spinand: macronix: Add support for read retry ...
2025-03-26Merge tag 'nand/for-6.15' into mtd/nextMiquel Raynal
* Raw NAND changes: i.MX8 and i.MX31 now have their own compatible, the Qcom driver got cleaned, the Broadcom driver got fixed. * SPI NAND changes: Two main features have been added: - OTP support has been brought, and ESMT and Micron manufacturer drivers implement it. - Read retry, and Macronix manufacturer driver implement it. There is as well a bunch of minor improvements and fixes in drivers and bindings.
2025-03-18mtd: rawnand: gpmi: Use str_enabled_disabled() in gpmi_nand_attach_chip()Zhang Heng
Remove hard-coded strings by using the str_enabled_disabled() helper function. Signed-off-by: Zhang Heng <zhangheng@kylinos.cn> Reviewed-by: Han Xu <han.xu@nxp.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2025-03-04mtd: rawnand: brcmnand: fix PM resume warningKamal Dasu
Fixed warning on PM resume as shown below caused due to uninitialized struct nand_operation that checks chip select field : WARN_ON(op->cs >= nanddev_ntargets(&chip->base) [ 14.588522] ------------[ cut here ]------------ [ 14.588529] WARNING: CPU: 0 PID: 1392 at drivers/mtd/nand/raw/internals.h:139 nand_reset_op+0x1e0/0x1f8 [ 14.588553] Modules linked in: bdc udc_core [ 14.588579] CPU: 0 UID: 0 PID: 1392 Comm: rtcwake Tainted: G W 6.14.0-rc4-g5394eea10651 #16 [ 14.588590] Tainted: [W]=WARN [ 14.588593] Hardware name: Broadcom STB (Flattened Device Tree) [ 14.588598] Call trace: [ 14.588604] dump_backtrace from show_stack+0x18/0x1c [ 14.588622] r7:00000009 r6:0000008b r5:60000153 r4:c0fa558c [ 14.588625] show_stack from dump_stack_lvl+0x70/0x7c [ 14.588639] dump_stack_lvl from dump_stack+0x18/0x1c [ 14.588653] r5:c08d40b0 r4:c1003cb0 [ 14.588656] dump_stack from __warn+0x84/0xe4 [ 14.588668] __warn from warn_slowpath_fmt+0x18c/0x194 [ 14.588678] r7:c08d40b0 r6:c1003cb0 r5:00000000 r4:00000000 [ 14.588681] warn_slowpath_fmt from nand_reset_op+0x1e0/0x1f8 [ 14.588695] r8:70c40dff r7:89705f41 r6:36b4a597 r5:c26c9444 r4:c26b0048 [ 14.588697] nand_reset_op from brcmnand_resume+0x13c/0x150 [ 14.588714] r9:00000000 r8:00000000 r7:c24f8010 r6:c228a3f8 r5:c26c94bc r4:c26b0040 [ 14.588717] brcmnand_resume from platform_pm_resume+0x34/0x54 [ 14.588735] r5:00000010 r4:c0840a50 [ 14.588738] platform_pm_resume from dpm_run_callback+0x5c/0x14c [ 14.588757] dpm_run_callback from device_resume+0xc0/0x324 [ 14.588776] r9:c24f8054 r8:c24f80a0 r7:00000000 r6:00000000 r5:00000010 r4:c24f8010 [ 14.588779] device_resume from dpm_resume+0x130/0x160 [ 14.588799] r9:c22539e4 r8:00000010 r7:c22bebb0 r6:c24f8010 r5:c22539dc r4:c22539b0 [ 14.588802] dpm_resume from dpm_resume_end+0x14/0x20 [ 14.588822] r10:c2204e40 r9:00000000 r8:c228a3fc r7:00000000 r6:00000003 r5:c228a414 [ 14.588826] r4:00000010 [ 14.588828] dpm_resume_end from suspend_devices_and_enter+0x274/0x6f8 [ 14.588848] r5:c228a414 r4:00000000 [ 14.588851] suspend_devices_and_enter from pm_suspend+0x228/0x2bc [ 14.588868] r10:c3502910 r9:c3501f40 r8:00000004 r7:c228a438 r6:c0f95e18 r5:00000000 [ 14.588871] r4:00000003 [ 14.588874] pm_suspend from state_store+0x74/0xd0 [ 14.588889] r7:c228a438 r6:c0f934c8 r5:00000003 r4:00000003 [ 14.588892] state_store from kobj_attr_store+0x1c/0x28 [ 14.588913] r9:00000000 r8:00000000 r7:f09f9f08 r6:00000004 r5:c3502900 r4:c0283250 [ 14.588916] kobj_attr_store from sysfs_kf_write+0x40/0x4c [ 14.588936] r5:c3502900 r4:c0d92a48 [ 14.588939] sysfs_kf_write from kernfs_fop_write_iter+0x104/0x1f0 [ 14.588956] r5:c3502900 r4:c3501f40 [ 14.588960] kernfs_fop_write_iter from vfs_write+0x250/0x420 [ 14.588980] r10:c0e14b48 r9:00000000 r8:c25f5780 r7:00443398 r6:f09f9f68 r5:c34f7f00 [ 14.588983] r4:c042a88c [ 14.588987] vfs_write from ksys_write+0x74/0xe4 [ 14.589005] r10:00000004 r9:c25f5780 r8:c02002fA0 r7:00000000 r6:00000000 r5:c34f7f00 [ 14.589008] r4:c34f7f00 [ 14.589011] ksys_write from sys_write+0x10/0x14 [ 14.589029] r7:00000004 r6:004421c0 r5:00443398 r4:00000004 [ 14.589032] sys_write from ret_fast_syscall+0x0/0x5c [ 14.589044] Exception stack(0xf09f9fa8 to 0xf09f9ff0) [ 14.589050] 9fa0: 00000004 00443398 00000004 00443398 00000004 00000001 [ 14.589056] 9fc0: 00000004 00443398 004421c0 00000004 b6ecbd58 00000008 bebfbc38 0043eb78 [ 14.589062] 9fe0: 00440eb0 bebfbaf8 b6de18a0 b6e579e8 [ 14.589065] ---[ end trace 0000000000000000 ]--- The fix uses the higher level nand_reset(chip, chipnr); where chipnr = 0, when doing PM resume operation in compliance with the controller support for single die nand chip. Switching from nand_reset_op() to nand_reset() implies more than just setting the cs field op->cs, it also reconfigures the data interface (ie. the timings). Tested and confirmed the NAND chip is in sync timing wise with host after the fix. Fixes: 97d90da8a886 ("mtd: nand: provide several helpers to do common NAND operations") Cc: stable@vger.kernel.org Signed-off-by: Kamal Dasu <kamal.dasu@broadcom.com> Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2025-02-24mtd: rawnand: use kcalloc() instead of kzalloc()Ethan Carter Edwards
We are trying to get rid of all multiplications from allocation functions to prevent integer overflows[1]. Here the multiplication is obviously safe, but using kcalloc() is more appropriate and improves readability. This patch has no effect on runtime behavior. Link: https://github.com/KSPP/linux/issues/162 [1] Link: https://www.kernel.org/doc/html/next/process/deprecated.html#open-coded-arithmetic-in-allocator-arguments Signed-off-by: Ethan Carter Edwards <ethan@ethancedwards.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2025-02-19mtd: rawnand: cadence: fix unchecked dereferenceNiravkumar L Rabara
Add NULL check before variable dereference to fix static checker warning. Fixes: d76d22b5096c ("mtd: rawnand: cadence: use dma_map_resource for sdma address") Reported-by: Dan Carpenter <dan.carpenter@linaro.org> Closes: https://lore.kernel.org/all/e448a22c-bada-448d-9167-7af71305130d@stanley.mountain/ Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2025-02-11mtd: rawnand: qcom: finish converting register to FIELD_PREPChristian Marangi
With some research in some obscure old QSDK, it was possible to find the MASK of the last register there were still set with raw shift and convert them to FIELD_PREP API. This is only a cleanup and modernize the code a bit and doesn't make any behaviour change. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2025-02-11mtd: rawnand: qcom: fix broken config in qcom_param_page_type_execChristian Marangi
Fix broken config in qcom_param_page_type_exec caused by copy-paste error from commit 0c08080fd71c ("mtd: rawnand: qcom: use FIELD_PREP and GENMASK") In qcom_param_page_type_exec the value needs to be set to nandc->regs->cfg0 instead of host->cfg0. This wrong configuration caused the Qcom NANDC driver to malfunction on any device that makes use of it (IPQ806x, IPQ40xx, IPQ807x, IPQ60xx) with the following error: [ 0.885369] nand: device found, Manufacturer ID: 0x2c, Chip ID: 0xaa [ 0.885909] nand: Micron NAND 256MiB 1,8V 8-bit [ 0.892499] nand: 256 MiB, SLC, erase size: 128 KiB, page size: 2048, OOB size: 64 [ 0.896823] nand: ECC (step, strength) = (512, 8) does not fit in OOB [ 0.896836] qcom-nandc 79b0000.nand-controller: No valid ECC settings possible [ 0.910996] bam-dma-engine 7984000.dma-controller: Cannot free busy channel [ 0.918070] qcom-nandc: probe of 79b0000.nand-controller failed with error -28 Restore original configuration fix the problem and makes the driver work again. Also restore the wrongly dropped cpu_to_le32 to correctly support BE systems. Cc: stable@vger.kernel.org Fixes: 0c08080fd71c ("mtd: rawnand: qcom: use FIELD_PREP and GENMASK") Tested-by: Robert Marko <robimarko@gmail.com> # IPQ8074 and IPQ6018 Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2025-02-10mtd: rawnand: cadence: fix incorrect device in dma_unmap_singleNiravkumar L Rabara
dma_map_single is using physical/bus device (DMA) but dma_unmap_single is using framework device(NAND controller), which is incorrect. Fixed dma_unmap_single to use correct physical/bus device. Fixes: ec4ba01e894d ("mtd: rawnand: Add new Cadence NAND driver to MTD subsystem") Cc: stable@vger.kernel.org Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2025-02-10mtd: rawnand: cadence: use dma_map_resource for sdma addressNiravkumar L Rabara
Remap the slave DMA I/O resources to enhance driver portability. Using a physical address causes DMA translation failure when the ARM SMMU is enabled. Fixes: ec4ba01e894d ("mtd: rawnand: Add new Cadence NAND driver to MTD subsystem") Cc: stable@vger.kernel.org Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2025-02-10mtd: rawnand: cadence: fix error code in cadence_nand_init()Niravkumar L Rabara
Replace dma_request_channel() with dma_request_chan_by_mask() and use helper functions to return proper error code instead of fixed -EBUSY. Fixes: ec4ba01e894d ("mtd: rawnand: Add new Cadence NAND driver to MTD subsystem") Cc: stable@vger.kernel.org Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2025-01-15Merge tag 'spi-mem-dtr-2' into nand/nextMiquel Raynal
spi: Support DTR in spi-mem Changes to support DTR with spi-mem.
2025-01-15mtd: rawnand: davinci: add ROM supported OOB layoutMarcus Folkesson
Add support for the OOB layout used by the ROM bootloader. The same layout is used by both Keystone [1] and OMAPL138/DA850 [2] which currently is the only users of davinci-nand. Only select this layout if the `nand-is-boot-medium` property is set. This to avoid breaking any existing devices out there. [1] https://www.ti.com/lit/ug/spruhj3/spruhj3.pdf [2] https://www.ti.com/lit/an/sprab41f/sprab41f.pdf Signed-off-by: Marcus Folkesson <marcus.folkesson@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2025-01-08mtd: rawnand: davinci: Reduce polling interval in NAND_OP_WAITRDY_INSTRBastien Curutchet
For each NAND_OP_WAITRDY_INSTR operation, the NANDFSR register is polled only once every 100 us to check for the EMA_WAIT pin. This isn't frequent enough and causes delays in NAND accesses. Set the polling interval to 5 us. It increases the page read speed reported by flash_speed by ~30% (~10% on page writes). Signed-off-by: Bastien Curutchet <bastien.curutchet@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2024-12-24Merge tag 'mtd/qcom-reorg-for-spi-6.14' into nand/nextMiquel Raynal
Topic branch with preparation changes from Qcom in order to apply on top the spi bits adding the Qcom SPI-NAND controller driver re-using a lot of code that has been shared. With this goal in mind, the raw NAND controller driver has been cleaned up and reorganized, and only the relevant structures/helpers which have nothing raw NAND specific should now be exported.
2024-12-24mtd: rawnand: qcom: use FIELD_PREP and GENMASKMd Sadre Alam
Use the bitfield macro FIELD_PREP, and GENMASK to do the shift and mask in one go. This makes the code more readable. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Md Sadre Alam <quic_mdalam@quicinc.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2024-12-24mtd: nand: Add qpic_common API fileMd Sadre Alam
Add qpic_common.c file which hold all the common qpic APIs which will be used by both qpic raw nand driver and qpic spi nand driver. Signed-off-by: Md Sadre Alam <quic_mdalam@quicinc.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2024-12-24mtd: rawnand: qcom: Add qcom prefix to common apiMd Sadre Alam
Add qcom prefix to all the api which will be commonly used by spi nand driver and raw nand driver. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Md Sadre Alam <quic_mdalam@quicinc.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2024-12-24mtd: rawnand: qcom: cleanup qcom_nandc driverMd Sadre Alam
Perform a global cleanup of the Qualcomm NAND controller driver with the following improvements: - Remove register value indirection API - Remove set_reg() API - Convert read_loc_first & read_loc_last macro to functions - Rename multiple variables Signed-off-by: Md Sadre Alam <quic_mdalam@quicinc.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2024-12-24mtd: rawnand: davinci: Implement setup_interface() operationBastien Curutchet
The setup_interface() operation isn't implemented. It forces the driver to use the ONFI mode 0, though it could use more optimal modes. Implement the setup_interface() operation. It uses the aemif_set_cs_timings() function from the AEMIF driver to update the chip select timings. The calculation of the register's contents is directly extracted from §20.3.2.3 of the DaVinci TRM [1] MAX_TH_PS and MAX_TSU_PS are the worst case timings based on the Keystone2 and DaVinci datasheets. [1] : https://www.ti.com/lit/ug/spruh77c/spruh77c.pdf Signed-off-by: Bastien Curutchet <bastien.curutchet@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2024-12-24mtd: rawnand: davinci: Add clock resourceBastien Curutchet
NAND controller has a reference clock inherited from the AEMIF (cf. Documentation/devicetree/bindings/memory-controllers/ti-aemif.txt) This clock isn't used yet by the driver. Add a struct clock in the struct davinci_nand_info so it can be used to compute timings. Signed-off-by: Bastien Curutchet <bastien.curutchet@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2024-12-24mtd: rawnand: davinci: Always depends on TI_AEMIFBastien Curutchet
DAVINCI_NAND depends on TI_AEMIF only when ARCH_KEYSTONE is selected while the NAND controller is also always a part of the AEMIF controller on DaVinci SoCs. Set a dependency on TI_AEMIF regardless of the selected architecture. Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202411020140.3wsKJOSB-lkp@intel.com/ Closes: https://lore.kernel.org/oe-kbuild-all/202411020957.X1T8T9ZR-lkp@intel.com/ Signed-off-by: Bastien Curutchet <bastien.curutchet@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2024-12-24mtd: rawnand: nuvoton: add new driver for the Nuvoton MA35 SoCHui-Ping Chen
Nuvoton MA35 SoCs NAND Flash Interface Controller supports 2kiB, 4kiB and 8kiB page size, and up to 8-bit, 12-bit, and 24-bit hardware ECC calculation circuit to protect data. Signed-off-by: Hui-Ping Chen <hpchen0nvt@gmail.com> [Miquel Raynal: Fixed compatible and driver name to match latest bindings] Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2024-12-24mtd: rawnand: brcmnand: fix status read of brcmnand_waitfuncdavid regan
This change fixes an issue where an error return value may be mistakenly used as NAND status. Fixes: f504551b7f15 ("mtd: rawnand: Propagate error and simplify ternary operators for brcmstb_nand_wait_for_completion()") Signed-off-by: david regan <dregan@broadcom.com> Reviewed-by: William Zhang <william.zhang@broadcom.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2024-12-05mtd: rawnand: omap2: Fix build warnings with W=1Roger Quadros
Add kernel-doc for functions to get rid of below warnings when built with W=1. drivers/mtd/nand/raw/omap2.c:260: warning: Function parameter or struct member 'chip' not described in 'omap_nand_data_in_pref' drivers/mtd/nand/raw/omap2.c:260: warning: Function parameter or struct member 'buf' not described in 'omap_nand_data_in_pref' drivers/mtd/nand/raw/omap2.c:260: warning: Function parameter or struct member 'len' not described in 'omap_nand_data_in_pref' drivers/mtd/nand/raw/omap2.c:260: warning: Function parameter or struct member 'force_8bit' not described in 'omap_nand_data_in_pref' drivers/mtd/nand/raw/omap2.c:304: warning: Function parameter or struct member 'chip' not described in 'omap_nand_data_out_pref' drivers/mtd/nand/raw/omap2.c:304: warning: Function parameter or struct member 'buf' not described in 'omap_nand_data_out_pref' drivers/mtd/nand/raw/omap2.c:304: warning: Function parameter or struct member 'len' not described in 'omap_nand_data_out_pref' drivers/mtd/nand/raw/omap2.c:304: warning: Function parameter or struct member 'force_8bit' not described in 'omap_nand_data_out_pref' drivers/mtd/nand/raw/omap2.c:446: warning: Function parameter or struct member 'chip' not described in 'omap_nand_data_in_dma_pref' drivers/mtd/nand/raw/omap2.c:446: warning: Function parameter or struct member 'buf' not described in 'omap_nand_data_in_dma_pref' drivers/mtd/nand/raw/omap2.c:446: warning: Function parameter or struct member 'len' not described in 'omap_nand_data_in_dma_pref' drivers/mtd/nand/raw/omap2.c:446: warning: Function parameter or struct member 'force_8bit' not described in 'omap_nand_data_in_dma_pref' drivers/mtd/nand/raw/omap2.c:467: warning: Function parameter or struct member 'chip' not described in 'omap_nand_data_out_dma_pref' drivers/mtd/nand/raw/omap2.c:467: warning: Function parameter or struct member 'buf' not described in 'omap_nand_data_out_dma_pref' drivers/mtd/nand/raw/omap2.c:467: warning: Function parameter or struct member 'len' not described in 'omap_nand_data_out_dma_pref' drivers/mtd/nand/raw/omap2.c:467: warning: Function parameter or struct member 'force_8bit' not described in 'omap_nand_data_out_dma_pref' Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202412031716.JfNIh1Uu-lkp@intel.com/ Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2024-12-05mtd: rawnand: arasan: Fix missing de-registration of NANDMaciej Andrzejewski
The NAND chip-selects are registered for the Arasan driver during initialization but are not de-registered when the driver is unloaded. As a result, if the driver is loaded again, the chip-selects remain registered and busy, making them unavailable for use. Fixes: 197b88fecc50 ("mtd: rawnand: arasan: Add new Arasan NAND controller") Cc: stable@vger.kernel.org Signed-off-by: Maciej Andrzejewski ICEYE <maciej.andrzejewski@m-works.net> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2024-12-05mtd: rawnand: arasan: Fix double assertion of chip-selectMaciej Andrzejewski
When two chip-selects are configured in the device tree, and the second is a non-native GPIO, both the GPIO-based chip-select and the first native chip-select may be asserted simultaneously. This double assertion causes incorrect read and write operations. The issue occurs because when nfc->ncs <= 2, nfc->spare_cs is always initialized to 0 due to static initialization. Consequently, when the second chip-select (GPIO-based) is selected in anfc_assert_cs(), it is detected by anfc_is_gpio_cs(), and nfc->native_cs is assigned the value 0. This results in both the GPIO-based chip-select being asserted and the NAND controller register receiving 0, erroneously selecting the native chip-select. This patch resolves the issue, as confirmed by oscilloscope testing with configurations involving two or more chip-selects in the device tree. Fixes: acbd3d0945f9 ("mtd: rawnand: arasan: Leverage additional GPIO CS") Cc: stable@vger.kernel.org Signed-off-by: Maciej Andrzejewski <maciej.andrzejewski@m-works.net> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2024-12-05mtd: diskonchip: Cast an operand to prevent potential overflowZichen Xie
There may be a potential integer overflow issue in inftl_partscan(). parts[0].size is defined as "uint64_t" while mtd->erasesize and ip->firstUnit are defined as 32-bit unsigned integer. The result of the calculation will be limited to 32 bits without correct casting. Fixes: 1da177e4c3f4 ("Linux-2.6.12-rc2") Signed-off-by: Zichen Xie <zichenxie0106@gmail.com> Cc: stable@vger.kernel.org Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2024-12-05mtd: nand: davinci: add support for on-die ECC engine typeMarcus Folkesson
Some chips, e.g. Micron MT29F1G08ABBFAH4, has a mandatory on-die ECC. Add "on-die" as ECC engine type in order to be compatible with those. Signed-off-by: Marcus Folkesson <marcus.folkesson@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2024-12-05mtd: rawnand: fix double free in atmel_pmecc_create_user()Dan Carpenter
The "user" pointer was converted from being allocated with kzalloc() to being allocated by devm_kzalloc(). Calling kfree(user) will lead to a double free. Fixes: 6d734f1bfc33 ("mtd: rawnand: atmel: Fix possible memory leak") Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2024-11-22Merge tag 'mtd/for-6.13' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux Pull MTD updates from Miquel Raynal: "MTD device changes: - switch platform_driver back to remove() - misc fixes SPI-NAND changes: - a load of fixes to Winbond manufacturer driver - structure constification Raw NAND changes: - improve the power management of the GPMI driver - Davinci driver clean-ups - fix leak in the Atmel driver - fix some typos in the core SPI NOR changes: - Introduce byte swap support for 8D-8D-8D mode and a user for it: macronix. SPI NOR flashes may swap the bytes on a 16-bit boundary when configured in Octal DTR mode. For such cases the byte order is propagated through SPI MEM to the SPI controllers so that the controllers swap the bytes back at runtime. This avoids breaking the boot sequence because of the endianness problems that appear when the bootloaders use 1-1-1 and the kernel uses 8D-8D-8D with byte swap support. Along with the SPI MEM byte swap support we queue a patch for the SPI MXIC controller that swaps the bytes back at runtime" * tag 'mtd/for-6.13' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux: (25 commits) mtd: spi-nor: core: replace dummy buswidth from addr to data mtd: spi-nor: winbond: add "w/ and w/o SFDP" comment mtd: spi-nor: spansion: Use nor->addr_nbytes in octal DTR mode in RD_ANY_REG_OP mtd: Switch back to struct platform_driver::remove() mtd: cfi_cmdset_0002: remove redundant assignment to variable ret mtd: spinand: Constify struct nand_ecc_engine_ops MAINTAINERS: add mailing list for GPMI NAND driver mtd: spinand: winbond: Sort the devices mtd: spinand: winbond: Ignore the last ID characters mtd: spinand: winbond: Fix 512GW, 01GW, 01JW and 02JW ECC information mtd: spinand: winbond: Fix 512GW and 02JW OOB layout mtd: nand: raw: gpmi: improve power management handling mtd: nand: raw: gpmi: switch to SYSTEM_SLEEP_PM_OPS mtd: rawnand: davinci: use generic device property helpers mtd: rawnand: davinci: break the line correctly mtd: rawnand: davinci: order headers alphabetically mtd: rawnand: atmel: Fix possible memory leak mtd: rawnand: Correct multiple typos in comments mtd: hyperbus: rpc-if: Add missing MODULE_DEVICE_TABLE mtd: spi-nor: add support for Macronix Octal flash ...
2024-11-21Merge tag 'nand/for-6.13' into mtd/nextMiquel Raynal
SPI-NAND changes: A load of fixes to Winbond manufacturer driver have been done, plus a structure constification. Raw NAND changes: The GPMI driver has been improved on the power management side. The Davinci driver has been cleaned up. A leak in the Atmel driver plus some typos in the core have been fixed.
2024-10-21mtd: Switch back to struct platform_driver::remove()Uwe Kleine-König
After commit 0edb555a65d1 ("platform: Make platform_driver::remove() return void") .remove() is (again) the right callback to implement for platform drivers. Convert all platform drivers below drivers/mtd to use .remove(), with the eventual goal to drop struct platform_driver::remove_new(). As .remove() and .remove_new() have the same prototypes, conversion is done by just changing the structure member name in the driver initializer. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20241007205803.444994-10-u.kleine-koenig@baylibre.com
2024-10-21mtd: nand: raw: gpmi: improve power management handlingHan Xu
Refactor the power management handling in the gpmi nand driver. Remove redundant pm_runtime calls in the driver probe function. Handle the pad control and use the leverage runtime suspend and resume calls to take care of clocks in system suspend and resume functions. Signed-off-by: Han Xu <han.xu@nxp.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20241007191319.220775-2-han.xu@nxp.com
2024-10-21mtd: nand: raw: gpmi: switch to SYSTEM_SLEEP_PM_OPSHan Xu
Replace the SET_SYSTEM_SLEEP_PM_OPS with modern SYSTEM_SLEEP_PM_OPS alternatives. Signed-off-by: Han Xu <han.xu@nxp.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20241007191319.220775-1-han.xu@nxp.com
2024-10-21mtd: rawnand: davinci: use generic device property helpersBartosz Golaszewski
There's no reason for this driver to be using OF-specific property accessors. Switch to using generic device property interfaces and replace the of.h include with property.h. This allows us to no longer check the existence of the associated of_node. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20241007122350.75285-3-brgl@bgdev.pl
2024-10-21mtd: rawnand: davinci: break the line correctlyBartosz Golaszewski
The line in nand_davinci_get_pdata() prototype is broken in a weird and unreadable way. Make it consistent with the rest of the code. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20241007122350.75285-2-brgl@bgdev.pl
2024-10-21mtd: rawnand: davinci: order headers alphabeticallyBartosz Golaszewski
For better readability, put all includes in alphabetical order. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20241007122350.75285-1-brgl@bgdev.pl
2024-10-21mtd: rawnand: atmel: Fix possible memory leakMiquel Raynal
The pmecc "user" structure is allocated in atmel_pmecc_create_user() and was supposed to be freed with atmel_pmecc_destroy_user(), but this other helper is never called. One solution would be to find the proper location to call the destructor, but the trend today is to switch to device managed allocations, which in this case fits pretty well. Replace kzalloc() by devm_kzalloc() and drop the destructor entirely. Reported-by: "Dr. David Alan Gilbert" <linux@treblig.org> Closes: https://lore.kernel.org/all/ZvmIvRJCf6VhHvpo@gallifrey/ Fixes: f88fc122cc34 ("mtd: nand: Cleanup/rework the atmel_nand driver") Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20241001203149.387655-1-miquel.raynal@bootlin.com
2024-10-21mtd: rawnand: Correct multiple typos in commentsShen Lichuan
Fixed some confusing spelling errors, the details are as follows: -in the code comments: remaing -> remaining alingment -> alignment capabilitiies -> capabilities operatoin -> operation decriptors -> descriptors stareted -> started Unfortunelly -> Unfortunately compatabable -> compatible depenent -> dependent Signed-off-by: Shen Lichuan <shenlichuan@vivo.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20240923065649.11966-1-shenlichuan@vivo.com
2024-10-02move asm/unaligned.h to linux/unaligned.hAl Viro
asm/unaligned.h is always an include of asm-generic/unaligned.h; might as well move that thing to linux/unaligned.h and include that - there's nothing arch-specific in that header. auto-generated by the following: for i in `git grep -l -w asm/unaligned.h`; do sed -i -e "s/asm\/unaligned.h/linux\/unaligned.h/" $i done for i in `git grep -l -w asm-generic/unaligned.h`; do sed -i -e "s/asm-generic\/unaligned.h/linux\/unaligned.h/" $i done git mv include/asm-generic/unaligned.h include/linux/unaligned.h git mv tools/include/asm-generic/unaligned.h tools/include/linux/unaligned.h sed -i -e "/unaligned.h/d" include/asm-generic/Kbuild sed -i -e "s/__ASM_GENERIC/__LINUX/" include/linux/unaligned.h tools/include/linux/unaligned.h
2024-09-26Merge tag 'soc-ep93xx-dt-6.12' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull SoC update from Arnd Bergmann: "Convert ep93xx to devicetree This concludes a long journey towards replacing the old board files with devictree description on the Cirrus Logic EP93xx platform. Nikita Shubin has been working on this for a long time, for details see the last post on https://lore.kernel.org/lkml/20240909-ep93xx-v12-0-e86ab2423d4b@maquefel.me/" * tag 'soc-ep93xx-dt-6.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (47 commits) dt-bindings: gpio: ep9301: Add missing "#interrupt-cells" to examples MAINTAINERS: Update EP93XX ARM ARCHITECTURE maintainer soc: ep93xx: drop reference to removed EP93XX_SOC_COMMON config net: cirrus: use u8 for addr to calm down sparse dmaengine: cirrus: use snprintf() to calm down gcc 13.3.0 dmaengine: ep93xx: Fix a NULL vs IS_ERR() check in probe() pinctrl: ep93xx: Fix raster pins typo spi: ep93xx: update kerneldoc comments for ep93xx_spi clk: ep93xx: Fix off by one in ep93xx_div_recalc_rate() clk: ep93xx: add module license dmaengine: cirrus: remove platform code ASoC: cirrus: edb93xx: Delete driver ARM: ep93xx: soc: drop defines ARM: ep93xx: delete all boardfiles ata: pata_ep93xx: remove legacy pinctrl use pwm: ep93xx: drop legacy pinctrl ARM: ep93xx: DT for the Cirrus ep93xx SoC platforms ARM: dts: ep93xx: Add EDB9302 DT ARM: dts: ep93xx: add ts7250 board ARM: dts: add Cirrus EP93XX SoC .dtsi ...
2024-09-21Merge tag 'mm-nonmm-stable-2024-09-21-07-52' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/akpm/mm Pull non-MM updates from Andrew Morton: "Many singleton patches - please see the various changelogs for details. Quite a lot of nilfs2 work this time around. Notable patch series in this pull request are: - "mul_u64_u64_div_u64: new implementation" by Nicolas Pitre, with assistance from Uwe Kleine-König. Reimplement mul_u64_u64_div_u64() to provide (much) more accurate results. The current implementation was causing Uwe some issues in the PWM drivers. - "xz: Updates to license, filters, and compression options" from Lasse Collin. Miscellaneous maintenance and kinor feature work to the xz decompressor. - "Fix some GDB command error and add some GDB commands" from Kuan-Ying Lee. Fixes and enhancements to the gdb scripts. - "treewide: add missing MODULE_DESCRIPTION() macros" from Jeff Johnson. Adds lots of MODULE_DESCRIPTIONs, thus fixing lots of warnings about this. - "nilfs2: add support for some common ioctls" from Ryusuke Konishi. Adds various commonly-available ioctls to nilfs2. - "This series fixes a number of formatting issues in kernel doc comments" from Ryusuke Konishi does that. - "nilfs2: prevent unexpected ENOENT propagation" from Ryusuke Konishi. Fix issues where -ENOENT was being unintentionally and inappropriately returned to userspace. - "nilfs2: assorted cleanups" from Huang Xiaojia. - "nilfs2: fix potential issues with empty b-tree nodes" from Ryusuke Konishi fixes some issues which can occur on corrupted nilfs2 filesystems. - "scripts/decode_stacktrace.sh: improve error reporting and usability" from Luca Ceresoli does those things" * tag 'mm-nonmm-stable-2024-09-21-07-52' of git://git.kernel.org/pub/scm/linux/kernel/git/akpm/mm: (103 commits) list: test: increase coverage of list_test_list_replace*() list: test: fix tests for list_cut_position() proc: use __auto_type more treewide: correct the typo 'retun' ocfs2: cleanup return value and mlog in ocfs2_global_read_info() nilfs2: remove duplicate 'unlikely()' usage nilfs2: fix potential oob read in nilfs_btree_check_delete() nilfs2: determine empty node blocks as corrupted nilfs2: fix potential null-ptr-deref in nilfs_btree_insert() user_namespace: use kmemdup_array() instead of kmemdup() for multiple allocation tools/mm: rm thp_swap_allocator_test when make clean squashfs: fix percpu address space issues in decompressor_multi_percpu.c lib: glob.c: added null check for character class nilfs2: refactor nilfs_segctor_thread() nilfs2: use kthread_create and kthread_stop for the log writer thread nilfs2: remove sc_timer_task nilfs2: do not repair reserved inode bitmap in nilfs_new_inode() nilfs2: eliminate the shared counter and spinlock for i_generation nilfs2: separate inode type information from i_state field nilfs2: use the BITS_PER_LONG macro ...
2024-09-12mtd: rawnand: add support for ts72xxNikita Shubin
Technologic Systems has it's own nand controller implementation in CPLD. Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me> Tested-by: Alexander Sverdlin <alexander.sverdlin@gmail.com> Acked-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-09-09treewide: correct the typo 'retun'WangYuli
There are some spelling mistakes of 'retun' in comments which should be instead of 'return'. Link: https://lkml.kernel.org/r/63D0F870EE8E87A0+20240906054008.390188-1-wangyuli@uniontech.com Signed-off-by: WangYuli <wangyuli@uniontech.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2024-09-09mtd: rawnand: mtk: Fix init error pathMiquel Raynal
Reviewing a series converting the for_each_chil_of_node() loops into their _scoped variants made me realize there was no cleanup of the already registered NAND devices upon error which may leak memory on systems with more than a chip when this error occurs. We should call the _nand_chips_cleanup() function when this happens. Fixes: 1d6b1e464950 ("mtd: mediatek: driver for MTK Smart Device") Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Pratyush Yadav <pratyush@kernel.org> Reviewed-by: Matthias Brugger <matthias.bgg@kernel.org> Link: https://lore.kernel.org/linux-mtd/20240826153019.67106-2-miquel.raynal@bootlin.com
2024-09-06mtd: rawnand: mtk: Factorize out the logic cleaning mtk chipsMiquel Raynal
There are some un-freed resources in one of the error path which would benefit from a helper going through all the registered mtk chips one by one and perform all the necessary cleanup. This is precisely what the remove path does, so let's extract the logic in a helper. There is no functional change. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Pratyush Yadav <pratyush@kernel.org> Reviewed-by: Matthias Brugger <matthias.bgg@kernel.org> Link: https://lore.kernel.org/linux-mtd/20240826153019.67106-1-miquel.raynal@bootlin.com
generated by cgit (git 2.34.1) at 2025-07-18 04:57:04 +0000