path: root/Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml

# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
# Copyright 2019 Analog Devices Inc.
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/adi,ad7192.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Analog Devices AD7192 ADC device driver

maintainers:
  - Michael Hennerich <michael.hennerich@analog.com>

description: |
  Bindings for the Analog Devices AD7192 ADC device. Datasheet can be
  found here:
  https://www.analog.com/media/en/technical-documentation/data-sheets/AD7192.pdf

properties:
  compatible:
    enum:
      - adi,ad7190
      - adi,ad7192
      - adi,ad7193
      - adi,ad7194
      - adi,ad7195

  "#address-cells":
    const: 1

  "#size-cells":
    const: 0

  reg:
    maxItems: 1

  spi-cpol: true

  spi-cpha: true

  clocks:
    maxItems: 1
    description:
      Optionally, either a crystal can be attached externally between MCLK1 and
      MCLK2 pins, or an external CMOS-compatible clock can drive the MCLK2
      pin. If absent, internal 4.92MHz clock is used, which can be made
      available on MCLK2 pin.

  clock-names:
    enum:
      - xtal
      - mclk

  "#clock-cells":
    const: 0
    description:
      If present when internal clock is used, configured as clock provider.

  interrupts:
    maxItems: 1

  aincom-supply:
    description: |
      AINCOM voltage supply. Analog inputs AINx are referenced to this input
      when configured for pseudo-differential operation.

  dvdd-supply:
    description: DVdd voltage supply

  avdd-supply:
    description: AVdd voltage supply

  vref-supply:
    description: VRef voltage supply

  adi,rejection-60-Hz-enable:
    description: |
      This bit enables a notch at 60 Hz when the first notch of the sinc
      filter is at 50 Hz. When REJ60 is set, a filter notch is placed at
      60 Hz when the sinc filter first notch is at 50 Hz. This allows
      simultaneous 50 Hz/ 60 Hz rejection.
    type: boolean

  adi,refin2-pins-enable:
    description: |
      External reference applied between the P1/REFIN2(+) and P0/REFIN2(−) pins.
    type: boolean

  adi,buffer-enable:
    description: |
      Enables the buffer on the analog inputs. If cleared, the analog inputs
      are unbuffered, lowering the power consumption of the device. If this
      bit is set, the analog inputs are buffered, allowing the user to place
      source impedances on the front end without contributing gain errors to
      the system.
    type: boolean

  adi,burnout-currents-enable:
    description: |
      When this bit is set to 1, the 500 nA current sources in the signal
      path are enabled. When BURN = 0, the burnout currents are disabled.
      The burnout currents can be enabled only when the buffer is active
      and when chop is disabled.
    type: boolean

  bipolar:
    description: see Documentation/devicetree/bindings/iio/adc/adc.yaml
    type: boolean

  rdy-gpios:
    description:
      GPIO reading the R̅D̅Y̅ line. Having such a GPIO is technically optional but
      highly recommended because DOUT/R̅D̅Y̅ toggles during SPI transfers (in its
      DOUT aka MISO role) and so usually triggers a spurious interrupt. The
      distinction between such a spurious event and a real one can only be done
      by reading such a GPIO. (There is a register telling the same
      information, but accessing that one needs a SPI transfer which then
      triggers another interrupt event.)
    maxItems: 1

patternProperties:
  "^channel@[0-9a-f]+$":
    type: object
    $ref: adc.yaml
    unevaluatedProperties: false

    properties:
      reg:
        description: The channel index.
        minimum: 0
        maximum: 271

      diff-channels:
        description:
          Both inputs can be connected to pins AIN1 to AIN16 by choosing the
          appropriate value from 1 to 16.
        items:
          minimum: 1
          maximum: 16

      single-channel:
        description:
          Positive input can be connected to pins AIN1 to AIN16 by choosing the
          appropriate value from 1 to 16. Negative input is connected to AINCOM.
        minimum: 1
        maximum: 16

    oneOf:
      - required:
          - reg
          - diff-channels
      - required:
          - reg
          - single-channel

required:
  - compatible
  - reg
  - interrupts
  - dvdd-supply
  - avdd-supply
  - vref-supply
  - spi-cpol
  - spi-cpha

allOf:
  - $ref: /schemas/spi/spi-peripheral-props.yaml#
  - if:
      properties:
        compatible:
          enum:
            - adi,ad7190
            - adi,ad7192
            - adi,ad7193
            - adi,ad7195
    then:
      patternProperties:
        "^channel@[0-9a-f]+$": false
  - if:
      anyOf:
        - required:
            - clocks
        - required:
            - clock-names
    then:
      properties:
        "#clock-cells": false
      required:
        - clocks
        - clock-names

unevaluatedProperties: false

examples:
  - |
    #include <dt-bindings/gpio/gpio.h>
    spi {
        #address-cells = <1>;
        #size-cells = <0>;

        adc@0 {
            compatible = "adi,ad7192";
            reg = <0>;
            spi-max-frequency = <1000000>;
            spi-cpol;
            spi-cpha;
            clocks = <&ad7192_mclk>;
            clock-names = "mclk";
            interrupts = <25 0x2>;
            interrupt-parent = <&gpio>;
            rdy-gpios = <&gpio 25 GPIO_ACTIVE_LOW>;
            aincom-supply = <&aincom>;
            dvdd-supply = <&dvdd>;
            avdd-supply = <&avdd>;
            vref-supply = <&vref>;

            adi,refin2-pins-enable;
            adi,rejection-60-Hz-enable;
            adi,buffer-enable;
            adi,burnout-currents-enable;
        };
    };
  - |
    #include <dt-bindings/gpio/gpio.h>
    spi {
        #address-cells = <1>;
        #size-cells = <0>;

        adc@0 {
            compatible = "adi,ad7194";
            reg = <0>;

            #address-cells = <1>;
            #size-cells = <0>;

            spi-max-frequency = <1000000>;
            spi-cpol;
            spi-cpha;
            #clock-cells = <0>;
            interrupts = <25 0x2>;
            interrupt-parent = <&gpio>;
            rdy-gpios = <&gpio 25 GPIO_ACTIVE_LOW>;
            aincom-supply = <&aincom>;
            dvdd-supply = <&dvdd>;
            avdd-supply = <&avdd>;
            vref-supply = <&vref>;

            channel@0 {
                reg = <0>;
                diff-channels = <1 6>;
            };

            channel@1 {
                reg = <1>;
                single-channel = <1>;
            };
        };
    };