diff options
| author | Duje Mihanović <duje@dujemihanovic.xyz> | 2025-09-13 23:12:51 +0200 |
|---|---|---|
| committer | Duje Mihanović <duje@dujemihanovic.xyz> | 2025-10-13 12:11:38 +0200 |
| commit | 0e53b0bcad00107ce82968e86ca11a23f8a91f48 (patch) | |
| tree | c8c83210ac321255cdf7f78c78a5a1012634b14f | |
| parent | b3061b16d53333723177a1601e9e0cd4565e6a1e (diff) | |
arm64: dts: marvell: pxa1908: Add power domains
Update the APMU clock controller's compatible to allow the new power
domain driver to probe. Also add the first two power domain consumers:
IOMMU (fixes probing) and framebuffer.
Signed-off-by: Duje Mihanović <duje@dujemihanovic.xyz>
| -rw-r--r-- | arch/arm64/boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts | 1 | ||||
| -rw-r--r-- | arch/arm64/boot/dts/marvell/mmp/pxa1908.dtsi | 5 |
2 files changed, 5 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts b/arch/arm64/boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts index 10e6730d71b6..b2ce5edd9c6a 100644 --- a/arch/arm64/boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts +++ b/arch/arm64/boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts @@ -24,6 +24,7 @@ fb0: framebuffer@17177000 { compatible = "simple-framebuffer"; reg = <0 0x17177000 0 (480 * 800 * 4)>; + power-domains = <&apmu PXA1908_POWER_DOMAIN_DSI>; width = <480>; height = <800>; stride = <(480 * 4)>; diff --git a/arch/arm64/boot/dts/marvell/mmp/pxa1908.dtsi b/arch/arm64/boot/dts/marvell/mmp/pxa1908.dtsi index deb1a9df27c2..5778bfdb8567 100644 --- a/arch/arm64/boot/dts/marvell/mmp/pxa1908.dtsi +++ b/arch/arm64/boot/dts/marvell/mmp/pxa1908.dtsi @@ -3,6 +3,7 @@ #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/clock/marvell,pxa1908.h> +#include <dt-bindings/power/marvell,pxa1908-power.h> / { model = "Marvell Armada PXA1908"; @@ -93,6 +94,7 @@ #iommu-cells = <1>; interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>; + power-domains = <&apmu PXA1908_POWER_DOMAIN_VPU>; status = "disabled"; }; @@ -337,9 +339,10 @@ }; apmu: clock-controller@82800 { - compatible = "marvell,pxa1908-apmu"; + compatible = "marvell,pxa1908-apmu", "syscon"; reg = <0x82800 0x400>; #clock-cells = <1>; + #power-domain-cells = <1>; }; }; }; |