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authorJason Gunthorpe <jgg@nvidia.com>2025-10-23 15:22:34 -0300
committerJoerg Roedel <joerg.roedel@amd.com>2025-11-05 09:50:19 +0100
commit1978fac28168bc3e6a66afb9c41ec0f1e8dafa0f (patch)
treec9163b57f462ef833e49e9f8f5b4ba263088acde
parent5448c1558f60d4051c90938f2878c6fb20e2982a (diff)
iommupt/x86: Set the dirty bit only for writable PTEs
AMD and VTD are historically different here, adopt the VTD version of setting the D bit only on writable PTEs as it makes more sense. Reviewed-by: Lu Baolu <baolu.lu@linux.intel.com> Reviewed-by: Kevin Tian <kevin.tian@intel.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
-rw-r--r--drivers/iommu/generic_pt/fmt/x86_64.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/iommu/generic_pt/fmt/x86_64.h b/drivers/iommu/generic_pt/fmt/x86_64.h
index 18d736d14b2d..7d01370e4ab0 100644
--- a/drivers/iommu/generic_pt/fmt/x86_64.h
+++ b/drivers/iommu/generic_pt/fmt/x86_64.h
@@ -192,9 +192,9 @@ static inline int x86_64_pt_iommu_set_prot(struct pt_common *common,
{
u64 pte;
- pte = X86_64_FMT_U | X86_64_FMT_A | X86_64_FMT_D;
+ pte = X86_64_FMT_U | X86_64_FMT_A;
if (iommu_prot & IOMMU_WRITE)
- pte |= X86_64_FMT_RW;
+ pte |= X86_64_FMT_RW | X86_64_FMT_D;
/*
* Ideally we'd have an IOMMU_ENCRYPTED flag set by higher levels to