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authorYao Zi <ziyao@disroot.org>2025-09-19 14:26:45 +0000
committerStephen Boyd <sboyd@kernel.org>2025-09-21 12:48:48 -0700
commit1ba5395c6ad0f40cd94792f737b2d19d6ec97e3c (patch)
tree64ac2f6d15e855fa812143a338574ed654044f3e
parent897117e35e180bc3f7346424c8b885ddb57fddc6 (diff)
clk: loongson2: Allow zero divisors for dividers
LS2K0300 and LS2K0500 ship divider clocks which allows zero divisors, in which case the divider acts the same as one is specified. Let's pass CLK_DIVIDER_ALLOW_ZERO when registering divider clocks to prepare for future introduction of these clocks. Signed-off-by: Yao Zi <ziyao@disroot.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
-rw-r--r--drivers/clk/clk-loongson2.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/clk/clk-loongson2.c b/drivers/clk/clk-loongson2.c
index bba97270376c..7a916c7d2718 100644
--- a/drivers/clk/clk-loongson2.c
+++ b/drivers/clk/clk-loongson2.c
@@ -361,7 +361,8 @@ static int loongson2_clk_probe(struct platform_device *pdev)
p->parent_name, 0,
clp->base + p->reg_offset,
p->div_shift, p->div_width,
- CLK_DIVIDER_ONE_BASED,
+ CLK_DIVIDER_ONE_BASED |
+ CLK_DIVIDER_ALLOW_ZERO,
&clp->clk_lock);
break;
case CLK_TYPE_GATE: