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authorChristian Bruel <christian.bruel@foss.st.com>2025-04-28 14:07:01 +0200
committerArnd Bergmann <arnd@arndb.de>2025-04-29 18:16:28 +0200
commit1bc229e9bb9cd502caeec639cb3cff50aea078f0 (patch)
tree07786af5acc353b542ce0120840afe3264e9bdac
parent02dc83f09c7262533123e7e4dae9c4f9fc40ed17 (diff)
arm64: dts: st: Use 128kB size for aliased GIC400 register access on stm32mp21 SoCs
Adjust the size of 8kB GIC regions to 128kB so that each 4kB is mapped 16 times over a 64kB region. The offset is then adjusted in the irq-gic driver. see commit 12e14066f4835 ("irqchip/GIC: Add workaround for aliased GIC400") Fixes: 7a57b1bb1afbf ("arm64: dts: st: introduce stm32mp21 SoCs family") Suggested-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Christian Bruel <christian.bruel@foss.st.com> Link: https://lore.kernel.org/r/20250415111654.2103767-5-christian.bruel@foss.st.com Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-rw-r--r--arch/arm64/boot/dts/st/stm32mp211.dtsi6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm64/boot/dts/st/stm32mp211.dtsi b/arch/arm64/boot/dts/st/stm32mp211.dtsi
index 52a8209471b8..bf888d60cd4f 100644
--- a/arch/arm64/boot/dts/st/stm32mp211.dtsi
+++ b/arch/arm64/boot/dts/st/stm32mp211.dtsi
@@ -118,9 +118,9 @@
intc: interrupt-controller@4ac10000 {
compatible = "arm,gic-400";
reg = <0x4ac10000 0x0 0x1000>,
- <0x4ac20000 0x0 0x2000>,
- <0x4ac40000 0x0 0x2000>,
- <0x4ac60000 0x0 0x2000>;
+ <0x4ac20000 0x0 0x20000>,
+ <0x4ac40000 0x0 0x20000>,
+ <0x4ac60000 0x0 0x20000>;
#interrupt-cells = <3>;
interrupt-controller;
};