diff options
| author | Jagan Teki <jagan@edgeble.ai> | 2023-07-31 16:30:08 +0530 |
|---|---|---|
| committer | Heiko Stuebner <heiko@sntech.de> | 2023-08-12 14:59:15 +0200 |
| commit | 1bf0dcb1e2a987a9281ae91f94e10c0de52c4952 (patch) | |
| tree | 07d99471d58d117fd41bd77c66f503de2c3ced24 | |
| parent | 4fafaed5afcc3a58e982629dbc0471ba9ba8678f (diff) | |
ARM: dts: rockchip: Add rv1126 VOP_LITE support
RV1126 VOP_LITE supports the video output processing ofMIPI DSI,
RGB display interfaces with max output resolution of 1920x1080.
Add support for vop in rv1126.
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Link: https://lore.kernel.org/r/20230731110012.2913742-11-jagan@edgeble.ai
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
| -rw-r--r-- | arch/arm/boot/dts/rockchip/rv1126.dtsi | 42 |
1 files changed, 42 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/rockchip/rv1126.dtsi b/arch/arm/boot/dts/rockchip/rv1126.dtsi index 3efeec97cabc..9c918420ecd5 100644 --- a/arch/arm/boot/dts/rockchip/rv1126.dtsi +++ b/arch/arm/boot/dts/rockchip/rv1126.dtsi @@ -83,6 +83,11 @@ clock-frequency = <24000000>; }; + display_subsystem { + compatible = "rockchip,display-subsystem"; + ports = <&vop_out>; + }; + xin24m: oscillator { compatible = "fixed-clock"; clock-frequency = <24000000>; @@ -371,6 +376,43 @@ clock-names = "pclk", "timer"; }; + vop: vop@ffb00000 { + compatible = "rockchip,rv1126-vop"; + reg = <0xffb00000 0x200>, <0xffb00a00 0x400>; + interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>; + clock-names = "aclk_vop", "dclk_vop", "hclk_vop"; + clocks = <&cru ACLK_VOP>, <&cru DCLK_VOP>, <&cru HCLK_VOP>; + reset-names = "axi", "ahb", "dclk"; + resets = <&cru SRST_VOP_A>, <&cru SRST_VOP_H>, <&cru SRST_VOP_D>; + iommus = <&vop_mmu>; + power-domains = <&power RV1126_PD_VO>; + status = "disabled"; + + vop_out: port { + #address-cells = <1>; + #size-cells = <0>; + + vop_out_rgb: endpoint@0 { + reg = <0>; + }; + + vop_out_dsi: endpoint@1 { + reg = <1>; + }; + }; + }; + + vop_mmu: iommu@ffb00f00 { + compatible = "rockchip,iommu"; + reg = <0xffb00f00 0x100>; + interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>; + clock-names = "aclk", "iface"; + clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>; + #iommu-cells = <0>; + power-domains = <&power RV1126_PD_VO>; + status = "disabled"; + }; + gmac: ethernet@ffc40000 { compatible = "rockchip,rv1126-gmac", "snps,dwmac-4.20a"; reg = <0xffc40000 0x4000>; |