diff options
| author | Jens Reidel <adrian@mainlining.org> | 2025-09-19 14:34:30 +0200 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2025-10-22 16:38:03 -0500 |
| commit | 2238840342af8e8d37a9355f0a2ad4285c32f854 (patch) | |
| tree | 6ea6e66e901dd039c63f6115a293f91e7b54c6b3 | |
| parent | 3a8660878839faadb4f1a6dd72c3179c1df56787 (diff) | |
dt-bindings: clock: sm7150-dispcc: Add MDSS_CORE reset
Add the index for a reset inside the dispcc on SM7150 SoC.
Signed-off-by: Jens Reidel <adrian@mainlining.org>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250919-sm7150-dispcc-fixes-v1-1-308ad47c5fce@mainlining.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
| -rw-r--r-- | include/dt-bindings/clock/qcom,sm7150-dispcc.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/qcom,sm7150-dispcc.h b/include/dt-bindings/clock/qcom,sm7150-dispcc.h index fc1fefe8fd72..1e4e6432d506 100644 --- a/include/dt-bindings/clock/qcom,sm7150-dispcc.h +++ b/include/dt-bindings/clock/qcom,sm7150-dispcc.h @@ -53,6 +53,9 @@ #define DISPCC_SLEEP_CLK 41 #define DISPCC_SLEEP_CLK_SRC 42 +/* DISPCC resets */ +#define DISPCC_MDSS_CORE_BCR 0 + /* DISPCC GDSCR */ #define MDSS_GDSC 0 |