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| author | Dmitry Baryshkov <dmitry.baryshkov@linaro.org> | 2024-12-24 12:12:13 +0200 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2025-01-06 18:05:27 -0600 |
| commit | 2b5add606ceac9fe4ea84ecd34351427b5602893 (patch) | |
| tree | 61f3e5d3e848169e2dd9f3fe05c059acbceb9cd3 | |
| parent | f81715a4c87c3b75ca2640bb61b6c66506061a64 (diff) | |
dt-bindings: clock: qcom,mmcc: support LVDS PLL input for apq8064
APQ8064 / MSM8960 have separate LVDS PLL driving the LVDS / LCDC clock.
Add corresponding input to clock controller bindings.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20241224-apq8064-fix-mmcc-v1-1-c95d2e2bf143@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
| -rw-r--r-- | Documentation/devicetree/bindings/clock/qcom,mmcc.yaml | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/clock/qcom,mmcc.yaml b/Documentation/devicetree/bindings/clock/qcom,mmcc.yaml index aa35a40648ba..59ac288ca5f1 100644 --- a/Documentation/devicetree/bindings/clock/qcom,mmcc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,mmcc.yaml @@ -78,6 +78,7 @@ allOf: then: properties: clocks: + minItems: 8 items: - description: Board PXO source - description: PLL 3 clock @@ -87,8 +88,10 @@ allOf: - description: DSI phy instance 2 dsi clock - description: DSI phy instance 2 byte clock - description: HDMI phy PLL clock + - description: LVDS PLL clock clock-names: + minItems: 8 items: - const: pxo - const: pll3 @@ -98,6 +101,7 @@ allOf: - const: dsi2pll - const: dsi2pllbyte - const: hdmipll + - const: lvdspll - if: properties: |