diff options
| author | Frank Li <Frank.Li@nxp.com> | 2024-10-21 12:34:35 -0400 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2024-10-22 15:39:52 +0800 |
| commit | 2bc80f42f43623f0def2c0d04c63c92745e20c10 (patch) | |
| tree | 2782c37b18c1facbcaacb1e96cf2bdc656df0fa3 | |
| parent | 125d499406fa966337a893dc14b9bcf598615f17 (diff) | |
arm64: dts: imx8qxp-mek: add flexcan1 and flexcan2
Add flexcan1 and flexcan2.
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8qxp-mek.dts | 47 |
1 files changed, 47 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts index caa2884684cb..3e04f7103f7e 100644 --- a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts +++ b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts @@ -66,6 +66,25 @@ regulator-name = "cs42888_supply"; }; + reg_can_en: regulator-can-en { + compatible = "regulator-fixed"; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; + regulator-name = "can-en"; + gpio = <&pca6416 3 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + reg_can_stby: regulator-can-stby { + compatible = "regulator-fixed"; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; + regulator-name = "can-stby"; + gpio = <&pca6416 5 GPIO_ACTIVE_HIGH>; + enable-active-high; + vin-supply = <®_can_en>; + }; + sound-bt-sco { compatible = "simple-audio-card"; simple-audio-card,bitclock-inversion; @@ -352,6 +371,20 @@ status = "okay"; }; +&flexcan1 { + pinctrl-0 = <&pinctrl_flexcan1>; + pinctrl-names = "default"; + xceiver-supply = <®_can_stby>; + status = "okay"; +}; + +&flexcan2 { + pinctrl-0 = <&pinctrl_flexcan2>; + pinctrl-names = "default"; + xceiver-supply = <®_can_stby>; + status = "okay"; +}; + &jpegdec { status = "okay"; }; @@ -592,6 +625,20 @@ >; }; + pinctrl_flexcan1: flexcan0grp { + fsl,pins = < + IMX8QXP_FLEXCAN0_TX_ADMA_FLEXCAN0_TX 0x21 + IMX8QXP_FLEXCAN0_RX_ADMA_FLEXCAN0_RX 0x21 + >; + }; + + pinctrl_flexcan2: flexcan1grp { + fsl,pins = < + IMX8QXP_FLEXCAN1_TX_ADMA_FLEXCAN1_TX 0x21 + IMX8QXP_FLEXCAN1_RX_ADMA_FLEXCAN1_RX 0x21 + >; + }; + pinctrl_ioexp_rst: ioexprstgrp { fsl,pins = < IMX8QXP_SPI2_SDO_LSIO_GPIO1_IO01 0x06000021 |