diff options
| author | Md Sadre Alam <quic_mdalam@quicinc.com> | 2025-03-06 17:03:55 +0530 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2025-03-14 11:58:21 -0500 |
| commit | 2eabf101f62a158fb66c2ff4a80ccd1581606568 (patch) | |
| tree | 331c43c166a94c749d1ba6ce4e75bc9b162f921f | |
| parent | 9b1a6c925c88ed9331a2cae64fb3580e05345ded (diff) | |
arm64: dts: qcom: ipq9574: Add SPI nand support
Add SPI NAND support for ipq9574 SoC.
Signed-off-by: Md Sadre Alam <quic_mdalam@quicinc.com>
Link: https://lore.kernel.org/r/20250306113357.126602-2-quic_mdalam@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
| -rw-r--r-- | arch/arm64/boot/dts/qcom/ipq9574.dtsi | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/dts/qcom/ipq9574.dtsi index 4c5b8ca4812c..769705d398c4 100644 --- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi @@ -675,6 +675,33 @@ status = "disabled"; }; + qpic_bam: dma-controller@7984000 { + compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0"; + reg = <0x07984000 0x1c000>; + interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&gcc GCC_QPIC_AHB_CLK>; + clock-names = "bam_clk"; + #dma-cells = <1>; + qcom,ee = <0>; + status = "disabled"; + }; + + qpic_nand: spi@79b0000 { + compatible = "qcom,ipq9574-snand"; + reg = <0x079b0000 0x10000>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&gcc GCC_QPIC_CLK>, + <&gcc GCC_QPIC_AHB_CLK>, + <&gcc GCC_QPIC_IO_MACRO_CLK>; + clock-names = "core", "aon", "iom"; + dmas = <&qpic_bam 0>, + <&qpic_bam 1>, + <&qpic_bam 2>; + dma-names = "tx", "rx", "cmd"; + status = "disabled"; + }; + usb_0_qusbphy: phy@7b000 { compatible = "qcom,ipq9574-qusb2-phy"; reg = <0x0007b000 0x180>; |