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authorAntony Kurniawan Soemardi <linux@smankusors.com>2025-09-21 03:08:05 +0000
committerBjorn Andersson <andersson@kernel.org>2025-11-02 11:27:08 -0600
commit34fc20c4844454765c8ba32fdc006a2246a3f246 (patch)
treefd0056645ae41282345e512eb265abaa77e11eab
parentdf41d58048a51e0f9c9b7a3710349f23efbfe64b (diff)
ARM: dts: qcom: msm8960: inline qcom-msm8960-pins.dtsi
Inline qcom-msm8960-pins.dtsi into the main SoC dtsi. Most Qualcomm SoCs embed their TLMM definitions directly, with only msm8960 and apq8064 using a separate pins file. After this change, only apq8064 remains split. This is a cosmetic change only, with no functional impact. Tested-by: Rudraksha Gupta <guptarud@gmail.com> Tested-by: Shinjo Park <peremen@gmail.com> Signed-off-by: Antony Kurniawan Soemardi <linux@smankusors.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250921-msm8960-reorder-v2-2-26c478366d21@smankusors.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
-rw-r--r--arch/arm/boot/dts/qcom/qcom-msm8960-pins.dtsi61
-rw-r--r--arch/arm/boot/dts/qcom/qcom-msm8960.dtsi59
2 files changed, 58 insertions, 62 deletions
diff --git a/arch/arm/boot/dts/qcom/qcom-msm8960-pins.dtsi b/arch/arm/boot/dts/qcom/qcom-msm8960-pins.dtsi
deleted file mode 100644
index f18753e9f5ef..000000000000
--- a/arch/arm/boot/dts/qcom/qcom-msm8960-pins.dtsi
+++ /dev/null
@@ -1,61 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-
-&msmgpio {
- i2c3_default_state: i2c3-default-state {
- i2c3-pins {
- pins = "gpio16", "gpio17";
- function = "gsbi3";
- drive-strength = <8>;
- bias-disable;
- };
- };
-
- i2c3_sleep_state: i2c3-sleep-state {
- i2c3-pins {
- pins = "gpio16", "gpio17";
- function = "gpio";
- drive-strength = <2>;
- bias-bus-hold;
- };
- };
-
- sdcc3_default_state: sdcc3-default-state {
- clk-pins {
- pins = "sdc3_clk";
- drive-strength = <8>;
- bias-disable;
- };
-
- cmd-pins {
- pins = "sdc3_cmd";
- drive-strength = <8>;
- bias-pull-up;
- };
-
- data-pins {
- pins = "sdc3_data";
- drive-strength = <8>;
- bias-pull-up;
- };
- };
-
- sdcc3_sleep_state: sdcc3-sleep-state {
- clk-pins {
- pins = "sdc3_clk";
- drive-strength = <2>;
- bias-disable;
- };
-
- cmd-pins {
- pins = "sdc3_cmd";
- drive-strength = <2>;
- bias-pull-up;
- };
-
- data-pins {
- pins = "sdc3_data";
- drive-strength = <2>;
- bias-pull-up;
- };
- };
-};
diff --git a/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi b/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi
index 6884f7f5b118..097baee47897 100644
--- a/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi
+++ b/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi
@@ -130,6 +130,64 @@
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
interrupt-controller;
#interrupt-cells = <2>;
+
+ i2c3_default_state: i2c3-default-state {
+ i2c3-pins {
+ pins = "gpio16", "gpio17";
+ function = "gsbi3";
+ drive-strength = <8>;
+ bias-disable;
+ };
+ };
+
+ i2c3_sleep_state: i2c3-sleep-state {
+ i2c3-pins {
+ pins = "gpio16", "gpio17";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-bus-hold;
+ };
+ };
+
+ sdcc3_default_state: sdcc3-default-state {
+ clk-pins {
+ pins = "sdc3_clk";
+ drive-strength = <8>;
+ bias-disable;
+ };
+
+ cmd-pins {
+ pins = "sdc3_cmd";
+ drive-strength = <8>;
+ bias-pull-up;
+ };
+
+ data-pins {
+ pins = "sdc3_data";
+ drive-strength = <8>;
+ bias-pull-up;
+ };
+ };
+
+ sdcc3_sleep_state: sdcc3-sleep-state {
+ clk-pins {
+ pins = "sdc3_clk";
+ drive-strength = <2>;
+ bias-disable;
+ };
+
+ cmd-pins {
+ pins = "sdc3_cmd";
+ drive-strength = <2>;
+ bias-pull-up;
+ };
+
+ data-pins {
+ pins = "sdc3_data";
+ drive-strength = <2>;
+ bias-pull-up;
+ };
+ };
};
gcc: clock-controller@900000 {
@@ -537,4 +595,3 @@
regulator-always-on;
};
};
-#include "qcom-msm8960-pins.dtsi"