diff options
author | Rob Clark <robdclark@chromium.org> | 2023-06-30 09:20:43 -0700 |
---|---|---|
committer | Rob Clark <robdclark@chromium.org> | 2023-08-07 14:28:06 -0700 |
commit | 3bf84665675625653ca4df099faa66ad80180f27 (patch) | |
tree | 1c1e90c84ecde60c10c31f4110c591b0b6b7c27c | |
parent | 90b593ce1c9e979e64f6dd3dccec11ed3654077f (diff) |
drm/msm/a6xx: Fix misleading comment
The range is actually len+1.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Akhil P Oommen <quic_akhilpo@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/545099/
-rw-r--r-- | drivers/gpu/drm/msm/adreno/a6xx_gpu.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.h b/drivers/gpu/drm/msm/adreno/a6xx_gpu.h index c788b06e72da..ab66d281828c 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.h +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.h @@ -39,8 +39,8 @@ struct a6xx_gpu { /* * Given a register and a count, return a value to program into - * REG_CP_PROTECT_REG(n) - this will block both reads and writes for _len - * registers starting at _reg. + * REG_CP_PROTECT_REG(n) - this will block both reads and writes for + * _len + 1 registers starting at _reg. */ #define A6XX_PROTECT_NORDWR(_reg, _len) \ ((1 << 31) | \ |