diff options
| author | Jongpill Lee <boyko.lee@samsung.com> | 2010-08-18 22:20:31 +0900 | 
|---|---|---|
| committer | Kukjin Kim <kgene.kim@samsung.com> | 2010-08-27 18:06:54 +0900 | 
| commit | 3ff310206db33e66c076b1f656e70e9080f5be50 (patch) | |
| tree | 18cb540c6e39b4b65030ad0f3c213ca617e76754 | |
| parent | 4d235f7934ab55329a5cb34d7e3949ba50b511d4 (diff) | |
ARM: S5PV310: Should be clk_sclk_apll not clk_mout_apll
This patch adds clk_sclk_apll so that fixes on clk_mout_apll.
Signed-off-by: Jongpill Lee <boyko.lee@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| -rw-r--r-- | arch/arm/mach-s5pv310/clock.c | 15 | 
1 files changed, 12 insertions, 3 deletions
| diff --git a/arch/arm/mach-s5pv310/clock.c b/arch/arm/mach-s5pv310/clock.c index 1659eb1e7b07..b3f50426148d 100644 --- a/arch/arm/mach-s5pv310/clock.c +++ b/arch/arm/mach-s5pv310/clock.c @@ -39,6 +39,14 @@ static struct clksrc_clk clk_mout_apll = {  	},  	.sources	= &clk_src_apll,  	.reg_src	= { .reg = S5P_CLKSRC_CPU, .shift = 0, .size = 1 }, +}; + +static struct clksrc_clk clk_sclk_apll = { +	.clk	= { +		.name		= "sclk_apll", +		.id		= -1, +		.parent		= &clk_mout_apll.clk, +	},  	.reg_div	= { .reg = S5P_CLKDIV_CPU, .shift = 24, .size = 3 },  }; @@ -61,7 +69,7 @@ static struct clksrc_clk clk_mout_mpll = {  };  static struct clk *clkset_moutcore_list[] = { -	[0] = &clk_mout_apll.clk, +	[0] = &clk_sclk_apll.clk,  	[1] = &clk_mout_mpll.clk,  }; @@ -154,7 +162,7 @@ static struct clksrc_clk clk_pclk_dbg = {  static struct clk *clkset_corebus_list[] = {  	[0] = &clk_mout_mpll.clk, -	[1] = &clk_mout_apll.clk, +	[1] = &clk_sclk_apll.clk,  };  static struct clksrc_sources clkset_mout_corebus = { @@ -220,7 +228,7 @@ static struct clksrc_clk clk_pclk_acp = {  static struct clk *clkset_aclk_top_list[] = {  	[0] = &clk_mout_mpll.clk, -	[1] = &clk_mout_apll.clk, +	[1] = &clk_sclk_apll.clk,  };  static struct clksrc_sources clkset_aclk_200 = { @@ -411,6 +419,7 @@ static struct clksrc_clk clksrcs[] = {  /* Clock initialization code */  static struct clksrc_clk *sysclks[] = {  	&clk_mout_apll, +	&clk_sclk_apll,  	&clk_mout_epll,  	&clk_mout_mpll,  	&clk_moutcore, | 
