diff options
| author | Kavyasree Kotagiri <kavyasree.kotagiri@microchip.com> | 2022-07-04 11:58:09 -0200 |
|---|---|---|
| committer | Claudiu Beznea <claudiu.beznea@microchip.com> | 2022-07-05 10:25:57 +0300 |
| commit | 43a4ab4cf5683b1d5efd0f5174f687412bfec9c5 (patch) | |
| tree | 649a2efa905fa94e4fe7f57ff9cb36d2a6c3e215 | |
| parent | 3e6fd02fce7bc415d702490026b41107c2c83763 (diff) | |
ARM: dts: lan966x: Cleanup flexcom3 usart pinctrl settings.
On pcb8291, Flexcom3 usart has only tx and rx pins.
Cleaningup usart3 pinctrl settings.
Signed-off-by: Kavyasree Kotagiri <kavyasree.kotagiri@microchip.com>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220704135809.6952-1-kavyasree.kotagiri@microchip.com
| -rw-r--r-- | arch/arm/boot/dts/lan966x-pcb8291.dts | 18 |
1 files changed, 4 insertions, 14 deletions
diff --git a/arch/arm/boot/dts/lan966x-pcb8291.dts b/arch/arm/boot/dts/lan966x-pcb8291.dts index 3c7e3a7d6f14..d56d2054c38d 100644 --- a/arch/arm/boot/dts/lan966x-pcb8291.dts +++ b/arch/arm/boot/dts/lan966x-pcb8291.dts @@ -19,19 +19,9 @@ }; &gpio { - fc_shrd7_pins: fc_shrd7-pins { - pins = "GPIO_49"; - function = "fc_shrd7"; - }; - - fc_shrd8_pins: fc_shrd8-pins { - pins = "GPIO_54"; - function = "fc_shrd8"; - }; - - fc3_b_pins: fcb3-spi-pins { - /* SCK, RXD, TXD */ - pins = "GPIO_51", "GPIO_52", "GPIO_53"; + fc3_b_pins: fc3-b-pins { + /* RX, TX */ + pins = "GPIO_52", "GPIO_53"; function = "fc3_b"; }; @@ -53,7 +43,7 @@ status = "okay"; usart3: serial@200 { - pinctrl-0 = <&fc3_b_pins>, <&fc_shrd7_pins>, <&fc_shrd8_pins>; + pinctrl-0 = <&fc3_b_pins>; pinctrl-names = "default"; status = "okay"; }; |