diff options
| author | Laurent Pinchart <laurent.pinchart@ideasonboard.com> | 2025-06-16 04:11:11 +0300 |
|---|---|---|
| committer | Hans Verkuil <hverkuil+cisco@kernel.org> | 2025-08-31 11:10:07 +0200 |
| commit | 4435a7a3fc283011a7b3e9c3b157aac8384333bd (patch) | |
| tree | c55f713f8e2338ad5874424521e69261e011a5d5 | |
| parent | acfaba169385bfa243a10a027f8272a974b2288a (diff) | |
dt-bindings: media: rkisp1: Add second power domain on i.MX8MP
In the NXP i.MX8MP, the pclk clock required by the ISP is gated by the
MIPI CSI-2 power domain. Add it to the power-domains property, and
require specifying power-domain-names accordingly.
Link: https://lore.kernel.org/r/20250616011115.19515-3-laurent.pinchart@ideasonboard.com
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org>
| -rw-r--r-- | Documentation/devicetree/bindings/media/rockchip-isp1.yaml | 19 |
1 files changed, 18 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/media/rockchip-isp1.yaml b/Documentation/devicetree/bindings/media/rockchip-isp1.yaml index 6b360cbb42e0..477c21417e75 100644 --- a/Documentation/devicetree/bindings/media/rockchip-isp1.yaml +++ b/Documentation/devicetree/bindings/media/rockchip-isp1.yaml @@ -71,7 +71,16 @@ properties: const: dphy power-domains: - maxItems: 1 + minItems: 1 + items: + - description: ISP power domain + - description: MIPI CSI-2 power domain + + power-domain-names: + minItems: 1 + items: + - const: isp + - const: csi2 ports: $ref: /schemas/graph.yaml#/properties/ports @@ -162,11 +171,19 @@ allOf: iommus: false phys: false phy-names: false + power-domains: + minItems: 2 + power-domain-names: + minItems: 2 required: - fsl,blk-ctrl + - power-domain-names else: properties: fsl,blk-ctrl: false + power-domains: + maxItems: 1 + power-domain-names: false required: - iommus - phys |