diff options
| author | Uma Shankar <uma.shankar@intel.com> | 2025-09-04 15:23:38 +0530 | 
|---|---|---|
| committer | Uma Shankar <uma.shankar@intel.com> | 2025-09-08 17:02:41 +0530 | 
| commit | 45b95459802afe9b7d7add22db98176749c88d6c (patch) | |
| tree | 0bd5ce520d8d6d6cf81a7304c4761f430c40fda2 | |
| parent | 30c3ffb880315b907ccd682ed4e17d20f786fdf9 (diff) | |
drm/i915/display: Remove FBC modulo 4 restriction for ADL-P+
WA:22010751166 does not apply past display version 12.  Or, in
other words, the FBC restriction where FBC is disabled for
non-modulo 4 plane sizes (including plane size + yoffset) is fixed
from display version 13 and onwards. Relax the restriction for the same.
v4: Dropped redundant commit message
v3: Update comments for clarity (Jonathan Cavitt)
v2: Update the macro for display version check (Vinod)
Suggested-by: Vidya Srinivas <vidya.srinivas@intel.com>
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
Reviewed-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
Link: https://lore.kernel.org/r/20250904095338.300813-2-uma.shankar@intel.com
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_fbc.c | 4 | 
1 files changed, 2 insertions, 2 deletions
| diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c index d4c5deff9cbe..9e097ed80bd1 100644 --- a/drivers/gpu/drm/i915/display/intel_fbc.c +++ b/drivers/gpu/drm/i915/display/intel_fbc.c @@ -1550,14 +1550,14 @@ static int intel_fbc_check_plane(struct intel_atomic_state *state,  	 * having a Y offset that isn't divisible by 4 causes FIFO underrun  	 * and screen flicker.  	 */ -	if (DISPLAY_VER(display) >= 9 && +	if (IS_DISPLAY_VER(display, 9, 12) &&  	    plane_state->view.color_plane[0].y & 3) {  		plane_state->no_fbc_reason = "plane start Y offset misaligned";  		return 0;  	}  	/* Wa_22010751166: icl, ehl, tgl, dg1, rkl */ -	if (DISPLAY_VER(display) >= 11 && +	if (IS_DISPLAY_VER(display, 9, 12) &&  	    (plane_state->view.color_plane[0].y +  	     (drm_rect_height(&plane_state->uapi.src) >> 16)) & 3) {  		plane_state->no_fbc_reason = "plane end Y offset misaligned"; | 
