diff options
| author | Richard Zhu <hongxing.zhu@nxp.com> | 2025-04-16 16:13:09 +0800 |
|---|---|---|
| committer | Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> | 2025-04-27 17:04:17 +0530 |
| commit | 4a4be0c088e3029a482ef8ac98bb2acb94af960e (patch) | |
| tree | a1bbca406a712a5ab0e420ea932fcc32fd65afdb | |
| parent | 9c03e30e3ade32136fed5a4ab7872dcb205687d3 (diff) | |
PCI: imx6: Call dw_pcie_wait_for_link() from start_link() callback only when required
Since the DWC driver is already calling dw_pcie_wait_for_link() after
calling the start_link() callback, remove the redundant
dw_pcie_wait_for_link() call from imx_pcie_start_link(). It is still
required to call this function for controllers supporting Gen 2 and higher
link speeds.
Suggested-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
[mani: subject and description rewording]
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Link: https://patch.msgid.link/20250416081314.3929794-3-hongxing.zhu@nxp.com
| -rw-r--r-- | drivers/pci/controller/dwc/pci-imx6.c | 15 |
1 files changed, 4 insertions, 11 deletions
diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index a4c0714c6468..c5871c3d4194 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -881,11 +881,11 @@ static int imx_pcie_start_link(struct dw_pcie *pci) /* Start LTSSM. */ imx_pcie_ltssm_enable(dev); - ret = dw_pcie_wait_for_link(pci); - if (ret) - goto err_reset_phy; - if (pci->max_link_speed > 1) { + ret = dw_pcie_wait_for_link(pci); + if (ret) + goto err_reset_phy; + /* Allow faster modes after the link is up */ dw_pcie_dbi_ro_wr_en(pci); tmp = dw_pcie_readl_dbi(pci, offset + PCI_EXP_LNKCAP); @@ -907,17 +907,10 @@ static int imx_pcie_start_link(struct dw_pcie *pci) dev_err(dev, "Failed to bring link up!\n"); goto err_reset_phy; } - - /* Make sure link training is finished as well! */ - ret = dw_pcie_wait_for_link(pci); - if (ret) - goto err_reset_phy; } else { dev_info(dev, "Link: Only Gen1 is enabled\n"); } - tmp = dw_pcie_readw_dbi(pci, offset + PCI_EXP_LNKSTA); - dev_info(dev, "Link up, Gen%i\n", tmp & PCI_EXP_LNKSTA_CLS); return 0; err_reset_phy: |