diff options
| author | Allen-KH Cheng <allen-kh.cheng@mediatek.com> | 2022-12-21 18:48:56 +0800 |
|---|---|---|
| committer | Matthias Brugger <matthias.bgg@gmail.com> | 2023-01-09 17:16:50 +0100 |
| commit | 558741f8fc3a014b4a7e53845edacf9274ae9093 (patch) | |
| tree | a6ec123c23d60d6d331dc0f95fb06821ee54f116 | |
| parent | 6d886dd46ff579bc97b0ef5eed023cdd8bbcdd3b (diff) | |
arm64: dts: mediatek: mt8186: Add crypto support for eMMC controller
For crypto support, add a crypto clock of the inline crypto engine and
expand the register size in the eMMC controller.
Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
Link: https://lore.kernel.org/r/20221221104856.28770-1-allen-kh.cheng@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
| -rw-r--r-- | arch/arm64/boot/dts/mediatek/mt8186.dtsi | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi b/arch/arm64/boot/dts/mediatek/mt8186.dtsi index 6321b7a440d2..c0a3afd55eaf 100644 --- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi @@ -911,12 +911,13 @@ mmc0: mmc@11230000 { compatible = "mediatek,mt8186-mmc", "mediatek,mt8183-mmc"; - reg = <0 0x11230000 0 0x1000>, + reg = <0 0x11230000 0 0x10000>, <0 0x11cd0000 0 0x1000>; clocks = <&topckgen CLK_TOP_MSDC50_0>, <&infracfg_ao CLK_INFRA_AO_MSDC0>, - <&infracfg_ao CLK_INFRA_AO_MSDC0_SRC>; - clock-names = "source", "hclk", "source_cg"; + <&infracfg_ao CLK_INFRA_AO_MSDC0_SRC>, + <&infracfg_ao CLK_INFRA_AO_MSDCFDE>; + clock-names = "source", "hclk", "source_cg", "crypto"; interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH 0>; assigned-clocks = <&topckgen CLK_TOP_MSDC50_0>; assigned-clock-parents = <&apmixedsys CLK_APMIXED_MSDCPLL>; |