diff options
| author | Kamal Dasu <kamal.dasu@broadcom.com> | 2025-10-07 10:04:30 -0400 |
|---|---|---|
| committer | Ulf Hansson <ulf.hansson@linaro.org> | 2025-10-21 13:37:39 +0200 |
| commit | 5ef9101006585253724ad6e37418516f83c4b75f (patch) | |
| tree | 55e924cf2bc40c8331c786fc4d12e409c4f87880 | |
| parent | c763d39f444d8a81d6da4e1aaa252f0eaa1caf6e (diff) | |
mmc: sdhci-brcmstb: move SDIO_CFG_CQ_CAPABILITY define
Moving SDIO_CFG_CQ_CAPABILITY register defines to be in sorted order for
better readability.
Signed-off-by: Kamal Dasu <kamal.dasu@broadcom.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| -rw-r--r-- | drivers/mmc/host/sdhci-brcmstb.c | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/drivers/mmc/host/sdhci-brcmstb.c b/drivers/mmc/host/sdhci-brcmstb.c index 15705e85417f..0320a27f69a7 100644 --- a/drivers/mmc/host/sdhci-brcmstb.c +++ b/drivers/mmc/host/sdhci-brcmstb.c @@ -31,13 +31,11 @@ #define SDHCI_ARASAN_CQE_BASE_ADDR 0x200 -#define SDIO_CFG_CQ_CAPABILITY 0x4c -#define SDIO_CFG_CQ_CAPABILITY_FMUL GENMASK(13, 12) - #define SDIO_CFG_CTRL 0x0 #define SDIO_CFG_CTRL_SDCD_N_TEST_EN BIT(31) #define SDIO_CFG_CTRL_SDCD_N_TEST_LEV BIT(30) - +#define SDIO_CFG_CQ_CAPABILITY 0x4c +#define SDIO_CFG_CQ_CAPABILITY_FMUL GENMASK(13, 12) #define SDIO_CFG_MAX_50MHZ_MODE 0x1ac #define SDIO_CFG_MAX_50MHZ_MODE_STRAP_OVERRIDE BIT(31) #define SDIO_CFG_MAX_50MHZ_MODE_ENABLE BIT(0) |