diff options
| author | Shubhrajyoti Datta <shubhrajyoti.datta@amd.com> | 2025-09-05 14:40:02 +0530 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2025-09-21 10:56:33 -0700 |
| commit | 7c2e86f7b5af93d0e78c16e4359318fe7797671d (patch) | |
| tree | eafe1bf37eb06721f601abd5934806334bb8d0bf | |
| parent | e0a94c6bb5b48c46ff4dd0533e79aacfda366b9f (diff) | |
clk: clocking-wizard: Fix output clock register offset for Versal platforms
The output clock register offset used in clk_wzrd_register_output_clocks
was incorrectly referencing 0x3C instead of 0x38, which caused
misconfiguration of output dividers on Versal platforms.
Correcting the off-by-one error ensures proper configuration of output
clocks.
Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@amd.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
| -rw-r--r-- | drivers/clk/xilinx/clk-xlnx-clock-wizard.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/xilinx/clk-xlnx-clock-wizard.c b/drivers/clk/xilinx/clk-xlnx-clock-wizard.c index 6af41d207ab5..d016f716d98c 100644 --- a/drivers/clk/xilinx/clk-xlnx-clock-wizard.c +++ b/drivers/clk/xilinx/clk-xlnx-clock-wizard.c @@ -1112,7 +1112,7 @@ static int clk_wzrd_register_output_clocks(struct device *dev, int nr_outputs) (dev, clkout_name, clk_name, 0, clk_wzrd->base, - (WZRD_CLK_CFG_REG(is_versal, 3) + i * 8), + (WZRD_CLK_CFG_REG(is_versal, 2) + i * 8), WZRD_CLKOUT_DIVIDE_SHIFT, WZRD_CLKOUT_DIVIDE_WIDTH, CLK_DIVIDER_ONE_BASED | |