diff options
| author | Rob Herring (Arm) <robh@kernel.org> | 2025-02-26 15:47:47 -0600 |
|---|---|---|
| committer | Gregory CLEMENT <gregory.clement@bootlin.com> | 2025-03-15 11:26:41 +0100 |
| commit | 7c5cf1be860aa80e46cb0e213f5e5505ec58b51e (patch) | |
| tree | 8dc64a4cd4709c4e34d7add61c9a35430b1caddd | |
| parent | 814ae20ada2c70b05d6f42be396c5d0b2903921b (diff) | |
arm64: dts: marvell: Move arch timer and pmu nodes to top-level
The Arm arch timer and PMU are not memory-mapped peripherals, and
therefore should not be under a "simple-bus" node. Move them to the
top-level like other platforms.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
| -rw-r--r-- | arch/arm64/boot/dts/marvell/armada-ap80x.dtsi | 29 | ||||
| -rw-r--r-- | arch/arm64/boot/dts/marvell/armada-ap810-ap0.dtsi | 18 |
2 files changed, 24 insertions, 23 deletions
diff --git a/arch/arm64/boot/dts/marvell/armada-ap80x.dtsi b/arch/arm64/boot/dts/marvell/armada-ap80x.dtsi index fdf88cd0eb02..e206d03a2867 100644 --- a/arch/arm64/boot/dts/marvell/armada-ap80x.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-ap80x.dtsi @@ -48,6 +48,21 @@ }; }; + timer { + compatible = "arm,armv8-timer"; + interrupt-parent = <&gic>; + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; + }; + + pmu { + compatible = "arm,cortex-a72-pmu"; + interrupt-parent = <&pic>; + interrupts = <17>; + }; + AP_NAME { #address-cells = <2>; #size-cells = <2>; @@ -122,20 +137,6 @@ }; }; - timer { - compatible = "arm,armv8-timer"; - interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, - <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, - <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, - <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; - }; - - pmu { - compatible = "arm,cortex-a72-pmu"; - interrupt-parent = <&pic>; - interrupts = <17>; - }; - odmi: odmi@300000 { compatible = "marvell,odmi-controller"; msi-controller; diff --git a/arch/arm64/boot/dts/marvell/armada-ap810-ap0.dtsi b/arch/arm64/boot/dts/marvell/armada-ap810-ap0.dtsi index f824eb56b0e2..b239df244ec5 100644 --- a/arch/arm64/boot/dts/marvell/armada-ap810-ap0.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-ap810-ap0.dtsi @@ -12,6 +12,7 @@ / { #address-cells = <2>; #size-cells = <2>; + interrupt-parent = <&gic>; aliases { serial0 = &uart0_ap0; @@ -23,11 +24,18 @@ method = "smc"; }; + timer { + compatible = "arm,armv8-timer"; + interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, + <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, + <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, + <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; + }; + ap810-ap0 { #address-cells = <2>; #size-cells = <2>; compatible = "simple-bus"; - interrupt-parent = <&gic>; ranges; config-space@e8000000 { @@ -60,14 +68,6 @@ }; }; - timer { - compatible = "arm,armv8-timer"; - interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, - <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, - <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, - <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; - }; - xor@400000 { compatible = "marvell,armada-7k-xor", "marvell,xor-v2"; reg = <0x400000 0x1000>, |