summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorSunil Khatri <sunil.khatri@amd.com>2024-07-09 10:59:36 +0530
committerAlex Deucher <alexander.deucher@amd.com>2024-07-10 10:12:48 -0400
commit948f2828a676d323c18dfa16e6a91c8103a97e4d (patch)
treeedaefced54a8eefa3451d127a2855eb66b8e2981
parent708f220567d4a398ee1553ee6519f7e73ae5ed6c (diff)
drm/amdgpu: select compute ME engines dynamically
GFX ME right now is one but this could change in future SOC's. Use no of ME for GFX as start point for ME for compute for GFX10. Signed-off-by: Sunil Khatri <sunil.khatri@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r--drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index 4bc2abe97087..2957702fca0c 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
@@ -9332,7 +9332,7 @@ static void gfx_v10_ip_dump(void *handle)
for (j = 0; j < adev->gfx.mec.num_pipe_per_mec; j++) {
for (k = 0; k < adev->gfx.mec.num_queue_per_pipe; k++) {
/* ME0 is for GFX so start from 1 for CP */
- nv_grbm_select(adev, 1 + i, j, k, 0);
+ nv_grbm_select(adev, adev->gfx.me.num_me + i, j, k, 0);
for (reg = 0; reg < reg_count; reg++) {
adev->gfx.ip_dump_compute_queues[index + reg] =