diff options
| author | Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> | 2025-11-06 22:16:04 +0100 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2025-11-12 11:09:02 +0100 |
| commit | a40efd0741f228023a87bf65b1cebe683e92172b (patch) | |
| tree | 814fb820aa8fe3d042cfb14ed7a1c54079ddb9d3 | |
| parent | f8ea1a2760296831a45a57748ae0587751b6688f (diff) | |
clk: renesas: r8a779a0: Add 3DGE module clock
Describe the 3DGE module clock needed to operate the PowerVR GPU.
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251106211604.2766465-5-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| -rw-r--r-- | drivers/clk/renesas/r8a779a0-cpg-mssr.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/renesas/r8a779a0-cpg-mssr.c b/drivers/clk/renesas/r8a779a0-cpg-mssr.c index 449611432059..d67dff05d9f4 100644 --- a/drivers/clk/renesas/r8a779a0-cpg-mssr.c +++ b/drivers/clk/renesas/r8a779a0-cpg-mssr.c @@ -142,6 +142,7 @@ static const struct cpg_core_clk r8a779a0_core_clks[] __initconst = { }; static const struct mssr_mod_clk r8a779a0_mod_clks[] __initconst = { + DEF_MOD("3dge", 0, R8A779A0_CLK_ZG), DEF_MOD("isp0", 16, R8A779A0_CLK_S1D1), DEF_MOD("isp1", 17, R8A779A0_CLK_S1D1), DEF_MOD("isp2", 18, R8A779A0_CLK_S1D1), |