summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorInochi Amaoto <inochiama@gmail.com>2024-10-24 14:21:02 +0800
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2024-11-04 02:02:19 +0100
commita54108ca42eabb54d34674c790d06d07256f570d (patch)
treef2915f26115a6ca557f3eed1c604bc2b9322f523
parent2fb3a142c6874353e5b1711034c790a25ef22cc9 (diff)
dt-bindings: serial: snps-dw-apb-uart: Add Sophgo SG2044 uarts
The UART of SG2044 is modified version of the standard Synopsys DesignWare UART. The UART on SG2044 relys on the internal divisor and can not set right clock rate for the common bitrates. Add compatibles string for the Sophgo SG2044 uarts. Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20241024062105.782330-3-inochiama@gmail.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-rw-r--r--Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml1
1 files changed, 1 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml
index 0ff56874d985..1c163cb5dff1 100644
--- a/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml
+++ b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml
@@ -56,6 +56,7 @@ properties:
- rockchip,rk3588-uart
- rockchip,rv1108-uart
- rockchip,rv1126-uart
+ - sophgo,sg2044-uart
- starfive,jh7100-hsuart
- starfive,jh7100-uart
- starfive,jh7110-uart