diff options
| author | Chukun Pan <amadeus@jmu.edu.cn> | 2025-04-01 18:00:20 +0800 |
|---|---|---|
| committer | Heiko Stuebner <heiko@sntech.de> | 2025-04-10 14:33:54 +0200 |
| commit | ab6fcb58aedf7df1d146b47d5fedd844a7c346e2 (patch) | |
| tree | 20c42a64589519df8df9ae720276cc812b639ec3 | |
| parent | 762b1f6503340b4729bc8a5fa6a5780712012cd8 (diff) | |
arm64: dts: rockchip: Add UART DMA support for RK3528
The UART ports on RK3528 have DMA capability, describe it.
Flow control is optional, so dma-names are not added.
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Link: https://lore.kernel.org/r/20250401100020.944658-4-amadeus@jmu.edu.cn
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
| -rw-r--r-- | arch/arm64/boot/dts/rockchip/rk3528.dtsi | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3528.dtsi b/arch/arm64/boot/dts/rockchip/rk3528.dtsi index 9c60bb414638..826f9be0be19 100644 --- a/arch/arm64/boot/dts/rockchip/rk3528.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3528.dtsi @@ -375,6 +375,7 @@ clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>; clock-names = "baudclk", "apb_pclk"; interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&dmac 8>, <&dmac 9>; reg-io-width = <4>; reg-shift = <2>; status = "disabled"; @@ -386,6 +387,7 @@ clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>; clock-names = "baudclk", "apb_pclk"; interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&dmac 10>, <&dmac 11>; reg-io-width = <4>; reg-shift = <2>; status = "disabled"; @@ -397,6 +399,7 @@ clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>; clock-names = "baudclk", "apb_pclk"; interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&dmac 12>, <&dmac 13>; reg-io-width = <4>; reg-shift = <2>; status = "disabled"; @@ -408,6 +411,7 @@ clocks = <&cru SCLK_UART3>, <&cru PCLK_UART3>; clock-names = "baudclk", "apb_pclk"; interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&dmac 14>, <&dmac 15>; reg-io-width = <4>; reg-shift = <2>; status = "disabled"; @@ -419,6 +423,7 @@ clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>; clock-names = "baudclk", "apb_pclk"; interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&dmac 16>, <&dmac 17>; reg-io-width = <4>; reg-shift = <2>; status = "disabled"; @@ -430,6 +435,7 @@ clocks = <&cru SCLK_UART5>, <&cru PCLK_UART5>; clock-names = "baudclk", "apb_pclk"; interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&dmac 18>, <&dmac 19>; reg-io-width = <4>; reg-shift = <2>; status = "disabled"; @@ -441,6 +447,7 @@ clocks = <&cru SCLK_UART6>, <&cru PCLK_UART6>; clock-names = "baudclk", "apb_pclk"; interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&dmac 20>, <&dmac 21>; reg-io-width = <4>; reg-shift = <2>; status = "disabled"; @@ -452,6 +459,7 @@ clocks = <&cru SCLK_UART7>, <&cru PCLK_UART7>; clock-names = "baudclk", "apb_pclk"; interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&dmac 22>, <&dmac 23>; reg-io-width = <4>; reg-shift = <2>; status = "disabled"; |