diff options
| author | Mark Brown <broonie@kernel.org> | 2025-10-24 11:36:32 +0100 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2025-10-24 11:36:32 +0100 |
| commit | ad68c0536cfc28c161593ca4c896a6e74435394b (patch) | |
| tree | 0e33d07a71cf0a9c086cf59995b5e09721c1438d | |
| parent | a35551a32d8686c0a33a580ebb8c8d6652b7971f (diff) | |
| parent | ba3a5e1aeaa01ea67067d725710a839114214fc6 (diff) | |
ASoC: fsl: correct the bit order issue for DSD
Merge series from Shengjiu Wang <shengjiu.wang@nxp.com>:
The DSD little endian format requires the msb first, the previous
understanding is not correct. The issue is found by testing with
pipewire.
| -rw-r--r-- | sound/soc/fsl/fsl_micfil.c | 4 | ||||
| -rw-r--r-- | sound/soc/fsl/fsl_sai.c | 3 |
2 files changed, 3 insertions, 4 deletions
diff --git a/sound/soc/fsl/fsl_micfil.c b/sound/soc/fsl/fsl_micfil.c index aabd90a8b3ec..cac26ba0aa4b 100644 --- a/sound/soc/fsl/fsl_micfil.c +++ b/sound/soc/fsl/fsl_micfil.c @@ -131,7 +131,7 @@ static struct fsl_micfil_soc_data fsl_micfil_imx943 = { .fifos = 8, .fifo_depth = 32, .dataline = 0xf, - .formats = SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_DSD_U32_BE, + .formats = SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_DSD_U32_LE, .use_edma = true, .use_verid = true, .volume_sx = false, @@ -823,7 +823,7 @@ static int fsl_micfil_hw_params(struct snd_pcm_substream *substream, break; } - if (format == SNDRV_PCM_FORMAT_DSD_U32_BE) { + if (format == SNDRV_PCM_FORMAT_DSD_U32_LE) { micfil->dec_bypass = true; /* * According to equation 29 in RM: diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c index 757e7868e322..65093325a6b6 100644 --- a/sound/soc/fsl/fsl_sai.c +++ b/sound/soc/fsl/fsl_sai.c @@ -353,7 +353,6 @@ static int fsl_sai_set_dai_fmt_tr(struct snd_soc_dai *cpu_dai, break; case SND_SOC_DAIFMT_PDM: val_cr2 |= FSL_SAI_CR2_BCP; - val_cr4 &= ~FSL_SAI_CR4_MF; sai->is_pdm_mode = true; break; case SND_SOC_DAIFMT_RIGHT_J: @@ -638,7 +637,7 @@ static int fsl_sai_hw_params(struct snd_pcm_substream *substream, val_cr5 |= FSL_SAI_CR5_WNW(slot_width); val_cr5 |= FSL_SAI_CR5_W0W(slot_width); - if (sai->is_lsb_first || sai->is_pdm_mode) + if (sai->is_lsb_first) val_cr5 |= FSL_SAI_CR5_FBT(0); else val_cr5 |= FSL_SAI_CR5_FBT(word_width - 1); |