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authorMiquel Raynal <miquel.raynal@bootlin.com>2025-11-05 18:27:00 +0100
committerPratyush Yadav <pratyush@kernel.org>2025-11-06 15:56:06 +0100
commitaee8c4d9d48d661624d72de670ebe5c6b5687842 (patch)
tree07043eb7297a008e70fcb605cb572fbd86cdacd8
parent3a8660878839faadb4f1a6dd72c3179c1df56787 (diff)
mtd: spi-nor: winbond: Add support for W25Q01NWxxIQ chips
This chip must be described as none of the block protection information are discoverable. This chip supports 4 bits plus the top/bottom addressing capability to identify the protected blocks. Cc: stable@vger.kernel.org Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Michael Walle <mwalle@kernel.org> Signed-off-by: Pratyush Yadav <pratyush@kernel.org>
-rw-r--r--drivers/mtd/spi-nor/winbond.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/mtd/spi-nor/winbond.c b/drivers/mtd/spi-nor/winbond.c
index 63a93c9eb917..a13a1201eae9 100644
--- a/drivers/mtd/spi-nor/winbond.c
+++ b/drivers/mtd/spi-nor/winbond.c
@@ -343,6 +343,10 @@ static const struct flash_info winbond_nor_parts[] = {
.id = SNOR_ID(0xef, 0x80, 0x20),
.name = "w25q512nwm",
.otp = SNOR_OTP(256, 3, 0x1000, 0x1000),
+ }, {
+ /* W25Q01NWxxIQ */
+ .id = SNOR_ID(0xef, 0x60, 0x21),
+ .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6 | SPI_NOR_4BIT_BP,
},
};