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authorKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>2025-08-22 15:34:24 +0200
committerKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>2025-09-04 15:50:30 +0200
commitb32a24f21283fbc86922006cc7d19fd23f70b8b8 (patch)
tree370b6a2fc3192e525389d10cb2156334b321d7e4
parentd5cb16361f89e7f60da76c7e9e32c72c49db3e82 (diff)
arm64: dts: amazon: alpine-v2: Add default GIC address cells
Add missing address-cells 0 to GIC interrupt node to silence W=1 warning: alpine-v2.dtsi:138.4-139.33: Warning (interrupt_map): /soc/pci@fbc00000:interrupt-map: Missing property '#address-cells' in node /soc/interrupt-controller@f0200000, using 0 as fallback Value '0' is correct because: 1. GIC interrupt controller does not have children, 2. interrupt-map property (in PCI node) consists of five components and the fourth component "parent unit address", which size is defined by '#address-cells' of the node pointed to by the interrupt-parent component, is not used (=0) Link: https://lore.kernel.org/r/20250822133423.312621-3-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
-rw-r--r--arch/arm64/boot/dts/amazon/alpine-v2.dtsi1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/amazon/alpine-v2.dtsi b/arch/arm64/boot/dts/amazon/alpine-v2.dtsi
index 5a72f0b64247..f49209fddbbb 100644
--- a/arch/arm64/boot/dts/amazon/alpine-v2.dtsi
+++ b/arch/arm64/boot/dts/amazon/alpine-v2.dtsi
@@ -123,6 +123,7 @@
<0x0 0xf0120000 0x0 0x2000>; /* GICH */
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
interrupt-controller;
+ #address-cells = <0>;
#interrupt-cells = <3>;
};