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authorImre Deak <imre.deak@intel.com>2025-07-24 21:29:00 +0300
committerImre Deak <imre.deak@intel.com>2025-07-25 17:41:50 +0300
commitc143db7dba1d3a4edce36c89c50e54dd856d7c41 (patch)
tree0f05628edb225e22e6caf5a16fc00b1bdea97428
parent16d2a92e7ec8c7828069f86a0aa7974acafb7e57 (diff)
drm/i915/dp: Fix disabling training pattern at end of UHBR link training
The Fixed: commit below overlooked the fact that intel_dp_link_train_all_phys() is only used for non-UHBR link rates, but intel_dp_stop_link_train() is used for both non-UHBR and UHBR link rates. Hence, after removing the disabling of the training pattern from intel_dp_stop_link_train(), the commit missed adding this back to the end of UHBR link training in intel_dp_128b132b_link_train(). This left the sink in link training mode at the end of an UHBR rate link training. Fix things by disabling the training pattern at the end of UHBR link training as well. Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Fixes: 11fab5a2a1ad ("drm/i915/dp: Clear DPCD training pattern before transmitting the idle pattern") Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://lore.kernel.org/r/20250724182900.160891-1-imre.deak@intel.com
-rw-r--r--drivers/gpu/drm/i915/display/intel_dp_link_training.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
index 344b74109a83..9d14b4e59545 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
@@ -1609,6 +1609,8 @@ out:
intel_dp_program_link_training_pattern(intel_dp, crtc_state,
DP_PHY_DPRX, DP_TRAINING_PATTERN_2);
+ intel_dp_disable_dpcd_training_pattern(intel_dp, DP_PHY_DPRX);
+
return passed;
}