diff options
| author | Shayne Chen <shayne.chen@mediatek.com> | 2023-01-31 17:35:59 +0800 |
|---|---|---|
| committer | Felix Fietkau <nbd@nbd.name> | 2023-02-03 14:47:27 +0100 |
| commit | c2eccffd9e3bdd15458ceae9d8567e20f77853ec (patch) | |
| tree | eae5f1d1081594d12c169575d21526375498ad63 | |
| parent | 01b7a2cab8053a32b9c715f6f53a5b072a3e5949 (diff) | |
wifi: mt76: add EHT phy type
Extend phy type and phymode bitfields for EHT support.
This is the preliminary patch to add EHT support for mt7996.
Signed-off-by: Shayne Chen <shayne.chen@mediatek.com>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
| -rw-r--r-- | drivers/net/wireless/mediatek/mt76/mt76.h | 7 | ||||
| -rw-r--r-- | drivers/net/wireless/mediatek/mt76/mt76_connac_mcu.h | 4 |
2 files changed, 9 insertions, 2 deletions
diff --git a/drivers/net/wireless/mediatek/mt76/mt76.h b/drivers/net/wireless/mediatek/mt76/mt76.h index a82b862b5bac..9e1588f1c119 100644 --- a/drivers/net/wireless/mediatek/mt76/mt76.h +++ b/drivers/net/wireless/mediatek/mt76/mt76.h @@ -264,11 +264,14 @@ enum mt76_phy_type { MT_PHY_TYPE_HE_EXT_SU, MT_PHY_TYPE_HE_TB, MT_PHY_TYPE_HE_MU, - __MT_PHY_TYPE_HE_MAX, + MT_PHY_TYPE_EHT_SU = 13, + MT_PHY_TYPE_EHT_TRIG, + MT_PHY_TYPE_EHT_MU, + __MT_PHY_TYPE_MAX, }; struct mt76_sta_stats { - u64 tx_mode[__MT_PHY_TYPE_HE_MAX]; + u64 tx_mode[__MT_PHY_TYPE_MAX]; u64 tx_bw[4]; /* 20, 40, 80, 160 */ u64 tx_nss[4]; /* 1, 2, 3, 4 */ u64 tx_mcs[16]; /* mcs idx */ diff --git a/drivers/net/wireless/mediatek/mt76/mt76_connac_mcu.h b/drivers/net/wireless/mediatek/mt76/mt76_connac_mcu.h index bb92216741a3..ebd64bec9f68 100644 --- a/drivers/net/wireless/mediatek/mt76/mt76_connac_mcu.h +++ b/drivers/net/wireless/mediatek/mt76/mt76_connac_mcu.h @@ -882,12 +882,16 @@ enum { #define PHY_MODE_AX_5G BIT(7) #define PHY_MODE_AX_6G BIT(0) /* phymode_ext */ +#define PHY_MODE_BE_24G BIT(1) +#define PHY_MODE_BE_5G BIT(2) +#define PHY_MODE_BE_6G BIT(3) #define MODE_CCK BIT(0) #define MODE_OFDM BIT(1) #define MODE_HT BIT(2) #define MODE_VHT BIT(3) #define MODE_HE BIT(4) +#define MODE_EHT BIT(5) #define STA_CAP_WMM BIT(0) #define STA_CAP_SGI_20 BIT(4) |