diff options
| author | Imre Deak <imre.deak@intel.com> | 2023-11-16 15:18:35 +0200 |
|---|---|---|
| committer | Imre Deak <imre.deak@intel.com> | 2023-11-21 16:32:44 +0200 |
| commit | c7ae0978f71222641059c20b2b025de0d8e989c7 (patch) | |
| tree | e9711e0235f75f7a2e0194dd9f38f21b54c30c66 | |
| parent | 3c460872d2a3e6915a475e6c04cb30fcb2b87115 (diff) | |
drm/i915/dp: Account for channel coding efficiency on UHBR links
Apply the correct BW allocation overhead and channel coding efficiency
on UHBR link rates, similarly to DP1.4 link rates.
Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231116131841.1588781-6-imre.deak@intel.com
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_display.c | 10 |
1 files changed, 0 insertions, 10 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 625b1ba93229..dd8ac647fe0e 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -2397,16 +2397,6 @@ add_bw_alloc_overhead(int link_clock, int bw_overhead, int ch_coding_efficiency = drm_dp_bw_channel_coding_efficiency(is_uhbr); - /* - * TODO: adjust for actual UHBR channel coding efficiency and BW - * overhead. - */ - if (is_uhbr) { - *data_m = pixel_data_rate; - *data_n = link_data_rate * 8 / 10; - return; - } - *data_m = DIV_ROUND_UP_ULL(mul_u32_u32(pixel_data_rate, bw_overhead), 1000000); *data_n = DIV_ROUND_DOWN_ULL(mul_u32_u32(link_data_rate, ch_coding_efficiency), |