diff options
| author | Vishwaroop A <va@nvidia.com> | 2025-04-16 11:06:03 +0000 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2025-04-24 14:30:56 +0100 |
| commit | d8966b65413390d1b5b706886987caac05fbe024 (patch) | |
| tree | 0aa543455325d10bfffbe355951135dae61cef25 | |
| parent | 400d9f1a27cc2fceabdb1ed93eaf0b89b6d32ba5 (diff) | |
spi: tegra210-quad: modify chip select (CS) deactivation
Modify the chip select (CS) deactivation and inter-transfer delay
execution only during the DATA_TRANSFER phase when the cs_change
flag is not set. This ensures proper CS handling and timing between
transfers while eliminating redundant operations.
Fixes: 1b8342cc4a38 ("spi: tegra210-quad: combined sequence mode")
Signed-off-by: Vishwaroop A <va@nvidia.com>
Link: https://patch.msgid.link/20250416110606.2737315-4-va@nvidia.com
Signed-off-by: Mark Brown <broonie@kernel.org>
| -rw-r--r-- | drivers/spi/spi-tegra210-quad.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/spi/spi-tegra210-quad.c b/drivers/spi/spi-tegra210-quad.c index a9359b005ee8..159fbbfd4a38 100644 --- a/drivers/spi/spi-tegra210-quad.c +++ b/drivers/spi/spi-tegra210-quad.c @@ -1159,16 +1159,16 @@ static int tegra_qspi_combined_seq_xfer(struct tegra_qspi *tqspi, ret = -EIO; goto exit; } - if (!xfer->cs_change) { - tegra_qspi_transfer_end(spi); - spi_transfer_delay_exec(xfer); - } break; default: ret = -EINVAL; goto exit; } msg->actual_length += xfer->len; + if (!xfer->cs_change && transfer_phase == DATA_TRANSFER) { + tegra_qspi_transfer_end(spi); + spi_transfer_delay_exec(xfer); + } transfer_phase++; } ret = 0; |